Commit Graph
43 Commits
Author SHA1 Message Date
ayo 689ac6f270 Merge pull request #37 from itchyfeetleech/rr-f-perf
engine/rr: preset F 7.4% faster (shared memory, conversion guards, hardware FP8 saturation, bounds checks, two-wave tail), byte-identical. Thank you for the PR!
2026-10-18 08:22:20 -04:00
ayo a40d2b4ec3 Merge pull request #36 from itchyfeetleech/vulkan-engine
vulkan: run the engine on the game's device, without staging. Thank you for the PR!
2026-10-18 08:22:10 -04:00
ayo 0e851b7f90 release: prepare 0.1.5 with RDNA2 kernels and in-game DLSS/FSR switching
- Add native preset K kernels for gfx1030–gfx1036 using software matrix
  products, with fast and accuracy builds and RDNA2 motion kernels.
- Follow OptiScaler's DLSS and RR preset overrides, sanitize unsupported
  values and select the preset matching the feature's quality mode.
- Enable FSR 4 under NVIDIA GPU spoofing by exposing real AMD PCI IDs
  to OptiScaler and FidelityFX modules; bundle AMD's loader and upscaler.
- Keep K on native kernels in engine auto mode unless HIP is selected,
  and fall back to CUDA for M/L when shader_float8 is unavailable.
- Add native-engine K GPU timings, preset recreation harness controls
  and regression coverage; fix the input-wait test's glibc name clash.
- Update configuration, installer guidance and release documentation,
  simplify the README and move gameplay videos to docs/videos.md.

RDNA2 kernels remain untested on RDNA2 hardware; software matrix
arithmetic was validated against WMMA on RDNA3.
2026-10-17 16:05:09 -04:00
ayo 34e6b0fe71 rr: add FSR Ray Regeneration, exact RDNA3 inference and motion experiments
Add an experimental FSR Ray Regeneration backend for D3D12 RR requests:
- Convert depth, motion, normals and albedos into AMD denoiser inputs.
- Split and recompose diffuse/specular signals, then run Super Sampling.
- Add stability/detail controls, demodulation guards and halo limiting.
- Handle AMD provider discovery under NVIDIA GPU spoofing.
- Add runtime probes, synthetic reference scenes and per-dispatch profiling.

Add exact gfx11 DLSS-RR inference using f16 cooperative matrices:
- Reproduce FP8 conversions, accumulation and camera reprojection arithmetic.
- Widen model weights and avoid requiring VK_EXT_shader_float8.
- Extend model building, replay tools and descriptor metadata.

Expand motion preprocessing and experimental AW2 native-motion support:
- Add tiled LDS dilation, padded allocation handling and thin-only sky fill.
- Order dilation with input waits and NGX on the selected stream.
- Add jitter-aligned native composition, hybrid routing and wire history repair.
- Add prepared masks, sparse repair and independent motion/repair controls.

Add optional fused R11G11B10 input/output conversion, sampled stage timings
and profile summarization. Extend configuration, packaging, documentation,
FidelityFX headers and CPU/GPU regression coverage.
2026-10-16 04:55:25 -04:00
ayo 162bbd77c8 shim: adaptive marker polling, opt-in GPU-side input wait/completion and RGBA8 output
- [Interop] MarkerPollUs = auto is the new default: the input-marker wait learns when
  each feature's inputs become ready, sleeps in <=200 us chunks, yields near the
  prediction and backs off when late (d4r_input_wait.h); a number keeps fixed pacing
  (0 yields). d4r_config.py no longer exports 200 when the key is unset

- D4R_SHIM_GPU_INPUT_WAIT=1 (experimental, split VRAM, age 0): NGX's null stream
  waits on a coherent Vulkan word imported into HIP (d4rStreamWaitValue32Eq) instead
  of CPU polling. The original readback marker stays the authority; a CPU watchdog
  releases discarded lists and timeouts. Denoiser, verify, capture and dilation
  frames keep the CPU wait

- D4R_SHIM_GPU_COMPLETION=1 (needs GPU_INPUT_WAIT): the bridge writes a completion
  word right after the native output kernel (d4rNgxWriteValue32), and the game's queue
  polls it with a bounded compute wait (kernels/support/vulkan_wait.comp), replacing
  the split list's CPU timeline signal. frame_retired writes the same word on every
  failure path

- D4R_SHIM_NATIVE_COMPLETION=1: a null-stream callback in the bridge signals the
  split timeline (d4rNgxTimeline*); D4rFrameCompletion::can_signal only releases the
  oldest outstanding frame

- RGBA8 output: tex_common.h adds an 'R4' redirect tag, so K's native output kernel
  stores packed RGBA8 directly (D4R_SHIM_OUTPUT_RGBA8=1, checked against the kernel
  manifest by d4rOutputKernelRgba8). Host packing handles RGBA8 too.
  patches/vkd3d-proton/0004 (VKD3D_D4R_LINEAR_RGBA8=WxH) makes such outputs linear and
  exportable so the result can be written in place

- D4R_SHIM_FUSE_RGBA8_INPUT=1: one Vulkan pass converts and copies RGBA8 color input
  (vulkan_read.comp mode 5 matches the blit's toward-zero halves, plus a row stride)

- profiling: thread CPU time from the Unix bridge (Wine's GetThreadTimes ticks at
  10 ms); game-queue D3D12 timestamps (vk_input/vk_dlss_wait/vk_output/vk_total);
  gpu_eval split into input_gpu_wait and dlss_gpu; D4R_PROFILE_GPU_EVENTS,
  _TIMESTAMPS, _LOG and _CPU_TIME=0 switch off individual parts for bisection

- bridge: D4R_NGX_STREAM_PRIORITY=high|normal runs NGX on a priority stream
  (off by default; no gain measured)

- release_feature: a feature already marked retiring by a failed drain can still
  be released normally

- harness: RGBA8 with motion and jitter scenes (re-quantized each frame),
  D4R_HARNESS_RGBA8_RAMP, D4R_HARNESS_THRASH_MB to evict L2/Infinity Cache before
  each evaluation

- kernels/native: in_hoist.py and split_output_paths.py (opt-in scheduling
  experiments); scripts/build_k_ldr_output.sh builds K's LDR output with an
  optional D4R_LDR_OUTPUT_MAX_VGPR cap

- tests: test_input_wait.py and test_latency_optimizations.py; MarkerPollUs and
  frame-completion tests updated
2026-10-13 22:30:41 -04:00
ayo d5c8be25c8 ASI add-on for existing OptiScaler installs
Add an optional D4R_INSTALL_MODE=asi release (d4r-<version>-asi.zip)
holding only d4r.asi and a companion d4r/ folder, to drop into an
existing OptiScaler plugin directory.

- Shim: export InitializeASI. It identifies OptiScaler by its PE export
  name to find the active INI, then launches d4r-setup.exe out of
  process (no GPU or network work under the loader lock). The .asi
  build loads its runtime and config from the companion d4r/ folder.

- tools/d4r_asi_setup.cpp: native helper. It waits for the game to
  exit, installs the D3D12 wrapper and the private d4r12core.dll beside
  the EXE, and merges the NGX route into the loader's INI (including
  GE-Proton's prefix-local INI) with backups. Unchanged launches do
  nothing. It skips Proton helpers and background utilities and runs
  setup for one plugin install at a time.

- scripts/private_d3d12_core.py: points vkd3d's d3d12.dll forwarder at
  d4r12core.dll without moving code addresses.

- install.sh runs from inside the ASI's d4r/ as well as the proxy
  release root. d4r-check.sh checks ASI installs (loader, plugin path,
  LoadAsiPlugins, HookOriginalNvngxOnly, Wine drive paths).

- Packaging, build script, docs, ASI_README.txt and tests.
2026-10-12 17:36:01 -04:00
ayo 503061d568 x4r 2026-10-12 05:37:36 -04:00
ayo 16cfc1f063 mt 2026-10-09 04:32:45 -04:00
ayo 694a7a0126 Add experimental native Vulkan DLSS frontend
Implement NGX's Vulkan API over the existing CUDA backend. Compute shaders
pack the game's sampled images into buffers shared with CUDA (device-local
memory exported through the Wine bridge), and a device event in the game's
command buffer holds its queue until the result is written back, keeping
frame age at zero. DLSS reads inputs through pitch-linear textures and its
native output kernel writes the shared buffer directly; input and
completion waits are adaptive.

Make it work across engines: shared buffers are concurrent over every
compute-capable queue family (Indiana Jones records DLSS on async compute),
depth kept in an R32F colour image is accepted under a depth aspect, and the
extension-requirement query allows a null list. Spare buffer sets are
imported on the first frame and never while a frame is pending, since an
import can block on GPU work that is waiting for us; host staging covers any
shortfall.

Fix two exit hazards. A game quitting without NGX shutdown left the GPU
waiting on an event that only a killed thread would set, resetting the ring
10 s later: the bridge now runs a shim hook before teardown and skips all
CUDA destroy/sync calls once Wine is shutting the process down. The shim's
own entry point skips CRT static destructors at process termination, where
locks held by killed threads made the exit spin forever.

Add a Vulkan DLSS harness (dynamic, recreate, discard, invalid, exit,
compute-queue and in-flight modes), staging/depth probes, ABI/config tests,
and an OptiScaler settings overlay for Vulkan games.
2026-10-09 02:57:23 -04:00
ayo 18c694eecb Change d4r license to GPL-3.0-only 2026-10-08 17:17:44 -04:00
ayo fb244c1ef9 i love gitignore 2026-10-08 16:04:26 -04:00
ayo 4d5952bdb4 no idea how that got there 👀 2026-10-08 16:04:08 -04:00
ayo 12782b3ff6 Merge pull request #31 from lunar-me/fix-docs/issue-012
docs: fix wrong article before `d4r.ini
2026-10-08 20:26:31 +01:00
ayo c276548dab Merge pull request #32 from lunar-me/fix-docs/issue-013
docs: fix wrong article before d4r folder in the packaging readme
2026-10-08 20:26:24 +01:00
ayo e86131d396 Merge pull request #30 from lunar-me/fix-docs/issue-011
docs: fix wrong article before `d4r` folder
2026-10-08 20:26:10 +01:00
ayo 0a12b6ce16 Add NVIDIA DLL downloader and bundle install.sh in release ZIPs 2026-10-07 16:43:38 -04:00
ayo e3d32a62a3 small package change 2026-10-07 16:33:29 -04:00
ayo a627439025 Add MicroCUDA backend, adaptive output wait, wider native K coverage (improve perf)
Shim
- Adaptive output-event wait: sleep to ~120 us before the predicted
  completion (smoothed per wait site), spin near it, back off when late.
  D4R_SHIM_OUTPUT_POLL_US restores a fixed interval.

- Defer the input-marker wait into the worker thread with VRAM interop
  (D4R_SHIM_DEFER_MARKER, default on), taking the host setup off the
  critical path.

MicroCUDA
- Experimental ZLUDA-free backend in wine_nvcuda_bridge, plus
  tools/microcuda and scripts/build_microcuda.sh. Serves accuracy, fast
  and native kernels; unregistered modules fall back to the reference
  path. Unclassified writes invalidate prepared weights.

M kernels
- SWIN_PREP_IDENTITY_AT: key weight prep by allocation identity
  (MicroCUDA); enc3 tube uses it with 8 slots. ZLUDA ignores it.

- dec2 (gfx1101): SWIN_PACKED_RESIDUAL, byte-identical, ~1.6% faster.

- Opt-in gfx12 hardware fp8 conversion (SWIN_FP8_HWCVT), unverified
  on hardware.

Native K translators
- ctile: handle variants that re-materialize the parameter base (mvlo).

- rewrite_output: check live-in registers, not just outputs.

- build.sh: native input covers all 8 flag variants, output the 4 HDR
  "max" variants; depth-tile skip stays mvhi-only.

Tools
- dump_runner and bench_dlss_kernel harness additions.
2026-10-07 15:54:38 -04:00
ayo c4954dc3c4 Recreate NGX feature on render size mismatch
Fixes the black screen when the game renders at a different size than
its DLSS feature (some games after a relaunch).
2026-10-05 16:06:13 -04:00
ayo 67c657bb90 Merge pull request #19 from Tk-Glitch/R9G9B9E5
Add support for DXGI_FORMAT_R9G9B9E5_SHAREDEXP
2026-10-05 20:41:57 +01:00
ayo 22026ede12 Port K kernel tuning and M gfx1101 flags
Preset K, byte-identical to the previous output in all captured buffers
and the harness image, measured on an RX 7700 XT:

- LDS row padding so WMMA operand loads hit distinct banks

- WGP mode for enc1/enc2/dec1/dec2, ds_bpermute half-wave exchange for
  enc0/dec0/dec3, more waves per window in enc4/dec4/dec5

- cheaper operand plumbing in common/wmma_layout.h (packed f16
  conversions, no dynamic vector indexing), raw buffer weight loads,
  accumulator-init vectors prepared once

- enc1 as a single-buffer recompute layer, dec1 Q/K/V chains split

- dec5 as four dependent phase kernels
2026-10-05 14:48:37 -04:00
ayo 8ce8618181 slight readme changes + discord server 2026-10-05 00:41:33 -04:00
ayo 6684888c0b Fix DLSS quality-change corruption and frame completion ordering
- Reprepare enc3 weights each launch to avoid stale caches after feature recreation
- Require per-slot input markers before evaluating recorded frames
- Advance split-frame timelines only through completed frames
- Add cancellation and readiness tests plus recreation consistency checks
- Update architecture and native kernel documentation

ref #8
2026-10-02 19:14:07 -04:00
ayo 1620c36e15 dlss settings clarified 2026-10-02 16:37:52 -04:00
ayo cb08e1c313 Fix OptiScaler NGX routing and align marker polling defaults
- Explicitly route OptiScaler to d4r\nvngx.dll in release packages.

- Extract INI generation into a helper that preserves line endings
  and rejects missing or duplicate settings.

- Check NGX routing separately from file presence and return failure
  when the installation is incomplete or misconfigured.

- Add an optional OptiScaler patch for external DLSS backends while
  preserving AMD identity for FSR4, with matching launch guidance.

- Align portable and launcher marker polling defaults at 200 us.

- Log when d4r's model override replaces game or OptiScaler presets.

- Add configuration, package, routing and coexistence regression tests.

- Update installation documentation, add FSR/DLSS comparison videos
  and ignore local .tools artifacts.

Refs: #7, #14
2026-10-02 16:32:49 -04:00
ayo f66cccaf28 Add experimental preset L and fix DLSS resource lifetimes and waits
- Build L texture variants and complete older release kernel bundles.
- Add selective Swin encoder fallback to reduce L/M motion trails.
- Add opt-in GPU motion-vector dilation for thin geometry and sky gaps.
- Replace GPU input waits with cancellable readiness polling and use
  sleeping event queries for completion.
- Retain recorded resources through command allocator completion, defer
  shutdown until cleanup, and preserve unfinished output synchronization.
- Extend lifecycle harness checks and add event, model and motion tests.
- Update configuration defaults, build scripts and release documentation.
2026-10-02 00:30:46 -04:00
ayo b645ef9096 Add DLSS accuracy mode and GLIBC 2.41 release builds
- Add default-off PreferAccuracy for all native kernel families,
  including RDNA4 FP8 variants.

- Restore intermediate FP8 quantization, per-MMA FP16 rounding,
  denormal handling and NGX synchronization in accuracy mode.

- Select separately marked accuracy kernels and use a separate JIT
  cache; reject mixed sets and never silently substitute fast kernels.

- Add a pinned GLIBC 2.41 build environment for ZLUDA/LLVM, the DLLs
  and both kernel sets, with ABI checks and toolchain provenance.

- Support parallel target builds and pre-extracted PTX; correct
  ROCm header paths and Clang-CL input handling.

- Bump to 0.1.3 and update release notes, documentation and tests.

Validation: 11 tests passed; all 912 kernels built; E/K/M GPU harness
runs completed with accuracy off/on. Packaged libraries loaded under
GLIBC 2.41 and require no GLIBC version newer than 2.38.

RTX image-quality parity remains unverified.

Fixes #6
Refs #6
2026-10-01 01:35:39 -04:00
ayo b2b3781aca Fix DLSS artifacts and improve synchronization diagnostics
- Fix Cyberpunk 2077 preset-K black artifacts by preserving FP16/FP64
  denormal requirements while limiting denormal suppression to FP32.

- Fix stale direct-output redirects after array destruction, preventing
  reused handles from inheriting an earlier feature's output buffer.

- Log rejected resource formats and dimensions, including failures after
  startup, with rate limiting for repeated errors.

- Add opt-in blocking output synchronization with a dedicated bridge
  export and fallback to context synchronization.

- Report output-wait CPU and wall time, and defer GPU timing queries
  until asynchronous evaluation has completed. The CPU-overhead
  mitigation for #7 still needs reporter confirmation.

- Reject release libraries requiring GLIBC newer than the configured
  baseline, defaulting to 2.41, and document compatible builds.

Validation: shim and bridge builds pass; targeted redirect-lifetime and
format-logging checks pass.

Fixes #5
Fixes #8
Refs #7
2026-09-30 23:17:25 -04:00
ayo 4334a0c3c4 Add RDNA4 (gfx12) support and a 0.1.2 optimization round
RDNA4 (experimental; untested on RDNA4 hardware)
- kernels/common/wmma_layout.h picks the WMMA operand/accumulator layout
  per target; K (pwin_*) and M (swin_*) index through it, so the same
  sources build for gfx11 and gfx12. D4R_WMMA_LAYOUT=12 on gfx11 is a test
  shim that runs the gfx12 indexing on gfx11 WMMA.

- M can use native e4m3 FP8 WMMA on gfx12 (D4R_NATIVE_FP8=1). Texture
  tails (enc0_tail, dec0_head) get gfx12 f16 and FP8 paths that match
  ZLUDA's gfx12 lowering.

- ZLUDA patch 0007: gfx12 WMMA helpers, optional native FP8 MMA
  (D4R_ZLUDA_WMMA_FP8_NATIVE), a layout override for testing, and an
  architecture argument for d4r_emit. Texture kernels are now compiled
  offline per target through d4r_emit (D4R_ZLUDA_EMIT) instead of on the
  local GPU.

- New d4r.ini option [Kernels] NativeFp8 (default on), wired through the
  shim and d4r_config.py. On gfx12 the bridge serves kernels/<arch>-fp8
  when it is on.

- The bridge picks the KFD GPU with the most SIMDs (so an iGPU is not
  chosen over a discrete GPU); D4R_GPU_ARCH overrides it.

- kernels/build.sh and package_release.sh build gfx1100-gfx1103 and
  gfx1200/gfx1201 (plus -fp8 variants), and D4R_BUNDLE_TEX takes
  per-target folders.

Performance (RDNA3; harness byte-identical unless noted)
- ZLUDA patch 0006: m16n8k8 f16 MMAs on WMMA (E; not bit-exact, 52-55 dB
  per layer, D4R_ZLUDA_WMMA_K8=0 disables it), per-key weight-image slots
  for native prep kernels (d4r_prep_key_at, d4r_prep_key_slots), and
  wave64 builds of MMA-free kernels (D4R_ZLUDA_WAVE64).

- M: packed FP8 encoding, conflict-free patch-merge reads, scalar weight
  loads in enc1, and weight prep once per weight set for the six enc3
  tube blocks.

- K: CU mode for the six non-wide pwin layers.

- Texture kernels: every DLSS flag variant is built natively (24 K output,
  8 M post, 4 M downsample, 4 M enc0), not only Townfall's; post and K
  output run as wave64.

- M direct output: rrlite_downsample_kernel writes the shim's output
  buffer; the shim's default direct-output presets are now 11,13.

Tools
- dump_runner takes the prep grid from d4r_prep_blocks and refuses
  texture/surface dumps.

- New pwin_check.py, swin_check.py, model_enc3.py and tail_check.hip.

Docs: README GPU table and RDNA4 notes, building (patches 0002-0007,
d4r_emit), native-kernels (RDNA4 section), performance (new numbers),
packaging README. Version 0.1.2.
2026-09-29 20:36:10 -04:00
ayo f310d52b69 package folder changes 2026-09-28 01:34:53 -04:00
ayo da263ecf75 Fix VRAM leak on quality changes and RGBA16 motion vectors; more games
- Shim: reuse VRAM interop buffers across features instead of freeing them;
  ROCm 7.2.x's hipExternalMemoryGetMappedBuffer retains its view twice, so
  freed buffers never released their memory (~130 MB per quality change)
- Bridge: close the exported fd after hipImportExternalMemory
- Shim: accept R16G16B16A16_TYPELESS motion vectors and convert 4-channel
  motion vectors to RG16F on the GPU, keeping VRAM interop (Dying Light:
  The Beast rendered black)
- Harness: D4R_HARNESS_RECREATE=N quality-change cycles,
  D4R_HARNESS_MV_RGBA16=1 motion vector format
- Supported games: TLOU, Control, Cyberpunk 2077, Rift Apart, HZD Remastered,
  Subnautica 2, Alan Wake 2, Silent Hill 2, Dying Light: The Beast; general notes
- README: GPU support section (native kernels only for gfx1101); ignore videos/
2026-09-28 01:26:51 -04:00
ayo 1952452830 Bundle the ROCm 7.2.4 runtime in the release zip 2026-09-27 18:59:07 -04:00
ayo bc31abdd50 Fix reflection lag from RGBA exposure 2026-09-27 18:31:42 -04:00
ayo 00cb497ede supported games 2026-09-27 17:49:42 -04:00
ayo db51da64ec supported games 2026-09-27 17:49:42 -04:00
ayo 508312ebf9 moved
Added a demo video link for DLSS Ultra Performance and removed duplicate mention.
2026-09-27 17:23:31 -04:00
ayo 818dd8bf42 Fix 8-bit DLSS VRAM interop 2026-09-27 17:22:04 -04:00
ayo bcc1fa6560 just link for demo 2026-09-27 17:01:03 -04:00
ayo 17c2c83723 Show DLSS demo preview in GitHub README 2026-09-27 16:55:46 -04:00
ayo 629bc35e9d ZLUDA: read null texture objects as zero (fixes Ghost of Tsushima GPU fault) 2026-09-27 16:53:22 -04:00
ayo b36b6d21c4 readme 2026-09-27 16:20:39 -04:00
ayo 0edf1b138f release notes 2026-09-27 16:13:32 -04:00
ayo 118173ecd7 d4r: official NVIDIA DLSS on AMD GPUs under Linux and Proton 2026-09-27 15:26:56 -04:00