Files
d4r/packaging/d4r.ini
T
woutermans f0b55a850a engine: this GPU's own arithmetic and shared weight tiles as the builders' defaults
- layer_m.comp builds relaxed by default (M_RELAXED: f32 accumulators, paired FP8
  conversions, no activation table) with two windows per wave sharing weight tiles
  (WPW=2); M_EXACT=1 keeps NVIDIA's roundings, bit-identical to the CUDA path
- layer.comp reuses weight tiles across its waves (TPW=2 in the 32-channel layers)
- engine/rr/rr2_w.comp: one wave per window for preset F's dec0_0 and enc0, used by
  compile_rr2.py at the new default D4R_RR_RELAXED=3 (build_native_model.sh too);
  D4R_RR_FUSE=1 matches the reference's fused multiply-adds, ptx2rr.py --snorm16
- [Engine] Network defaults to vulkan; the HIP network is opt-in
2026-10-14 00:52:41 +02:00

104 lines
5.3 KiB
INI

; Modified in this fork for CUDA Ray Reconstruction support and validation (2026).
; d4r settings for this game. This file lives in the game's d4r folder and applies to this game only.
; "auto" means the built-in default. Any setting can also be overridden with the environment variable
; that config/d4r.ini.default in the source repository lists for it, e.g. in the game's launch options.
[DLSS]
; DLSS model recommendations:
;
; Model | DLSS | Recommended modes | Notes
; ------+-------+---------------------------------+----------------------------------
; K | 4 | DLAA / Quality / Balanced | Default; faster alternative to M/L
; M | 4.5 | Performance | More demanding on RDNA3
; L | 4.5 | Ultra Performance | Especially 4K; experimental
; E | 3 CNN | Quality / Balanced / Performance | Legacy faster fallback
; F | 3 CNN | DLAA / Ultra Performance | Deprecated; prefer K or L
;
; Select the upscaling mode separately in game/OptiScaler. These are recommendations;
; other modes are allowed. L requires the L texture build.
; game = use the game/OptiScaler choice. Benchmarks: D4R_README.txt.
Model = K
; NVIDIA's library marks the image "DLSS SDK - DO NOT DISTRIBUTE" in this setup; d4r turns that off.
; true shows it.
ShowWatermark = false
[RayReconstruction]
; Requires a CUDA-capable nvngx_dlssd.dll (tested: 310.7) beside nvngx.dll and RR enabled in game.
; auto uses the denoiser when available; false disables the route.
; RR D/E temporal validation on gfx1201 uses [Kernels] NativeFp8 = on; scalar FP8 RR is not validated.
Enable = auto
; Independent denoiser presets: auto (game choice), default, D, E (transformer) or F (DLSS 4.5).
; E and F through NVIDIA's library need a denoiser DLL containing that model (F: 310.9 or later). On the engine
; ([Engine] Enabled = true) F runs from the model in d4r\engine\rr-f; frames the library serves instead show
; preset D when the DLL is older (d4r_nvngx.log says so).
Model = auto
[Latency]
; 0: every frame shows its own DLSS result, as with a native upscaler (needs the d3d12.dll that came
; with d4r next to the game).
; 1-3: allow results up to that many frames old. Slightly more fps, more input latency.
FrameAge = 0
[Kernels]
; Prioritize fidelity over speed. Uses accuracy variants of all native kernels, preserves NVIDIA's
; intermediate FP8/f16 rounding and denormal handling, and keeps NGX's synchronization calls.
; Slower but aims to match RTX DLSS.
PreferAccuracy = false
; false reduces L/M motion trails by using original enc1/enc2 layers; other native kernels stay on.
; Best paired with PreferAccuracy = true; costs some GPU time. Restart after changing this.
NativeSwinEncoders = true
; Hand-written RDNA3 and RDNA4 kernels for the DLSS 4 and 4.5 networks (d4r\kernels). Each one is used
; only when your DLSS library's code for that kernel matches the code it was written for; otherwise
; that kernel is compiled from NVIDIA's code instead, which is slower but still correct.
NativeKernels = on
; RDNA4 (RX 9000 series) only: run DLSS's FP8 math on the GPU's native FP8 matrix units, with NVIDIA's
; own FP8 rounding in the DLSS 4.5 (M) layers. off runs it as 16-bit math, as on RDNA3. Ignored on
; other GPUs.
NativeFp8 = on
[Interop]
; Experimental thin-feature tracking: 0 = off; 1/2 = opaque-surface dilation radius.
; Both enabled values fill sky gaps from the nearest foreground within 8 render pixels.
; Requires render- or display-resolution, unjittered motion vectors and same-frame linear VRAM inputs. Restart to change.
; Unsupported features keep original vectors; larger radii may affect disocclusion edges.
MotionVectorDilation = 0
; Keep inputs and output in video memory. Input and output readiness waits use CPU sleeps.
VramInterop = true
; Microseconds between checks for the game's input marker (default 200; 0 yields).
MarkerPollUs = 200
LinearInputs = true
ElideNgxSync = true
; Lets DLSS's last kernel write straight into the game's output buffer (DLSS 4 / K only). It takes
; effect only while d4r's own output kernel runs, which it does when the DLSS library matches.
DirectOutput = auto
[Engine]
; Experimental. Runs DLSS 4 and 4.5 (models K, L and M) on d4r's own Vulkan inference engine instead of NVIDIA's
; kernels: the game shows the result of the frame it just rendered and [Latency] / [Interop] do not apply.
; Needs Mesa RADV with VK_KHR_cooperative_matrix and the models in d4r\engine\k, k-ldr, m, m-ldr, l and l-ldr
; (see D4R_README.txt). Games or settings it does not cover use the normal path; d4r_nvngx.log says why.
Enabled = false
; Another model K folder for games with the HDR flag (a path relative to the d4r folder, or a Windows path
; such as Z:\home\me\k)
ModelDir = auto
; auto / vulkan = the network on the engine's shader, hip = on d4r's native HIP layer kernels when the model
; folder has them
Network = auto
[Paths]
; Linux paths.
; ROCm installation (default: the ROCm runtime in d4r\rocm, else /opt/rocm)
RocmDir = auto
; Cache for the compiled DLSS kernels (default ~/.cache/d4r). The first launch fills it.
CacheDir = auto
[Debug]
; d4r's log is d4r\d4r_nvngx.log, rewritten at every launch.
; Profile = true adds one line of timings per frame.
Profile = false
[Env]
; Extra environment variables for d4r, NAME = value.
; Sleeping event queries are the default; 0 restores context waits for an A/B comparison.
; D4R_SHIM_BLOCKING_SYNC = 0