woutermans
8eb7a94533
- engine/compile_rr2.py, runtime_rr2.inc, engine/rr/rr2_m.comp, exposure_f.comp, gen_rr2_enc0.py, rr2_pack.py, rr2_ref.py: the rr2_* model (nvngx_dlssd.dll 310.9's third network) as d4r's own shaders - exposure, enc0 gather/block split, enc1-5 and dec4-0 through one matrix shader, translated output passes; weights packed from the DLL, argument blocks from the capture - ptx2rr: match the driver's fused roundings - opaque-zero OR around cvt.rn.f16.f32 against v_fma_mix, half-away-from-zero formatted stores, UNORM 10:10:10:2 as RGBA32F of q/1023, OCML tanhF with the AMDGPU exp lowering, binary16 fma and fetch roundings; --probe for register bisection against ZLUDA - dec0_m/swin_m/enc0_*: RR_MIX build option (D4R_RR_MIX=1), one v_fma_mix rounding per 32-deep step, ~5% faster, not bit-exact; default build stays exact - runtime_rr.inc: RModel/REngine dispatch to the D4RR0002 model; replay_rr: RGBA32F and A2B10G10R1010 texel sizes, roughnessPacked bit, larger debug staging - shim: engine\rr-f model slot, 310.9 version probe so preset F is only claimed when the CUDA path has it; d4r.ini / d4r_config.py Model = F; run_rr_engine_compare.sh D4R_RR_DLL - kernels/rr/swin_native.h + rr_swin_native_test.cpp: HIP port of encoder 1 for the FP8-product and rounding cost measurements - engine/rr/README: preset F's block, options, capture-by-capture results, timings and the open camera-matrix difference
70 lines
4.3 KiB
GLSL
70 lines
4.3 KiB
GLSL
// Native part of engine/rr/enc0_m.comp (generated by engine/rr/gen_enc0_m.py): declarations, after the translated
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// header. Binding 1 holds NGX's weight image followed by engine/rr/enc0_pack.py's blob (offsets in enc0_m_w.h already
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// include its base); binding 2 is the arena.
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#extension GL_EXT_shader_8bit_storage : require
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#extension GL_KHR_shader_subgroup_vote : require
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#extension GL_EXT_control_flow_attributes : require
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#extension GL_GOOGLE_include_directive : require
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#include "enc0_m_w.h"
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#include "rr_exact.glsl"
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layout(set = 0, binding = 1, std430) readonly buffer W8 { floate4m3_t w[]; } w8;
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layout(set = 0, binding = 1, std430) readonly buffer W16 { float16_t w[]; } w16;
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layout(set = 0, binding = 1, std430) readonly buffer W16U { uint16_t w[]; } w16u;
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layout(set = 0, binding = 1, std430) readonly buffer W8U { uint8_t w[]; } w8u;
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layout(set = 0, binding = 2, std430) buffer Arena { uint w[]; } arena;
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#define ACC coopmat<float, gl_ScopeSubgroup, 16, 16, gl_MatrixUseAccumulator>
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#define HAC coopmat<float16_t, gl_ScopeSubgroup, 16, 16, gl_MatrixUseAccumulator>
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#define A8 coopmat<floate4m3_t, gl_ScopeSubgroup, 16, 16, gl_MatrixUseA>
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#define B8 coopmat<floate4m3_t, gl_ScopeSubgroup, 16, 16, gl_MatrixUseB>
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#define RM gl_CooperativeMatrixLayoutRowMajor
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#define CM gl_CooperativeMatrixLayoutColumnMajor
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#define LDA(dst, base, k, mt, kt) coopMatLoad((dst), w8.w, (base) + 256u * ((mt) * ((k) / 16u) + (kt)), 16u, RM)
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#define LDB(dst, base, n, kt, nt) coopMatLoad((dst), w8.w, (base) + 256u * ((kt) * ((n) / 16u) + (nt)), 16u, RM)
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#define RND(m) [[unroll]] for (int i_ = 0; i_ < 8; ++i_) (m)[i_] = rnd16((m)[i_]);
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#define Q8(dst, src) Q8PAIRS(dst, src)
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// One 32-deep step onto an accumulator that holds binary16 values. The reference (and the default here) adds the
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// accumulator inside the f32 products and rounds the result to binary16. RR_MIX (build_native_model.sh with
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// D4R_RR_MIX=1) keeps the accumulator as binary16, sums the products from zero and takes f16(P + acc), which the
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// driver compiles to one v_fma_mix per element in place of two conversions: about 5% faster, but a single rounding
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// where the reference has two, so a value can come out one binary16 step away (engine/rr/README.md).
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// RAC is the accumulator type, RV(x) a binary16 value as its element; K32H is the step on a binary16 matrix.
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#ifdef RR_MIX
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#define RAC HAC
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#define RV(x) (x)
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#define K32(acc, a0, b0, a1, b1) { ACC p_ = coopMatMulAdd((a1), (b1), coopMatMulAdd((a0), (b0), ACC(0.0))); [[unroll]] for (int i_ = 0; i_ < 8; ++i_) (acc)[i_] = float16_t(p_[i_] + float((acc)[i_])); }
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#define K32H(acc, a0, b0, a1, b1) K32(acc, a0, b0, a1, b1)
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#else
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#define RAC ACC
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#define RV(x) float(x)
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#define K32(acc, a0, b0, a1, b1) { (acc) = coopMatMulAdd((a1), (b1), coopMatMulAdd((a0), (b0), (acc))); RND(acc) }
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#define K32H(acc, a0, b0, a1, b1) { ACC p_ = coopMatMulAdd((a1), (b1), coopMatMulAdd((a0), (b0), ACC(acc))); [[unroll]] for (int i_ = 0; i_ < 8; ++i_) (acc)[i_] = float16_t(p_[i_]); }
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#endif
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const uint HEAD = W_WK1 - W_WK0, BRANCH = W_W1_1 - W_W1_0;
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shared uint KVS[2 * 768]; // the current head's K, then V^T; before the attention the key pixels' features
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#define XF KVS // the key pixels' 32 FP8 features (plane 0 | plane 1), slot-major
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shared uint XT[96 * 8]; // the normalised key tokens
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#define RR_KS KVS
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#define RR_KS0 0u
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#define RR_VS KVS
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#define RR_VS0 768u
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#define MG XT // the merge rows (16 x 128 FP8) reuse XT
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shared float16_t O112[64 * 4]; // surface 112 per token, for surface 128's 2x2 sums
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ivec2 keyXY(uint t, int x0, int y0)
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{
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if (t < 64u) return ivec2(x0 + int(t & 7u), y0 + int(t >> 3u));
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const int i = int(t & 7u), side = int((t - 64u) >> 3u);
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return ivec2(side < 2 ? x0 + i : (side == 2 ? x0 - 1 : x0 + 8), side == 0 ? y0 - 1 : (side == 1 ? y0 + 8 : y0 + i));
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}
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uint pack4(floate4m3_t a, floate4m3_t b, floate4m3_t c, floate4m3_t d)
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{
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return code(a) | (code(b) << 8u) | (code(c) << 16u) | (code(d) << 24u);
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}
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uvec2 mergeXY(uint r) { return r < 8u ? uvec2(r >> 1u, r & 1u) : uvec2((r - 8u) >> 1u, 2u + (r & 1u)); }
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// the translated prologue's shared buffer sh: input_noise (10 x 10 pixels, 4 f16) at byte 0, input_tensor (two planes
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// of 10 x 10 pixels x 16 FP8 features) at byte 800
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float16_t noiseAt(uint gx, uint gy, uint c)
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{
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const uint b = 80u * gy + 8u * gx + 2u * c;
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return hb((sh[b >> 2] >> (8u * (b & 2u))) & 0xffffu);
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}
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