woutermans
798e25611c
Patch 0011 merges a complete accumulator-register pair overwrite into one shadow-layout conversion (reads, rewritten shadow accesses and block boundaries prevent it; partial writes keep read/modify/write), and requests eight waves per SIMD for gfx12 native-FP8 functions. Patch 0012 keeps signs in the native conversion: finite overflow clamped, NaNs mapped to signed infinity, post-conversion sign masks gone; plain and ReLU remain exhaustive-table identical to the software codec. Eighty-frame harness at 720p->4K, excluding the first twenty: control 24.764 ms, coalescing 23.340 ms, plus eight waves 20.135 ms, plus signed conversion 16.234 ms (15.144 ms with the harness idle gap removed); all eighty saved frames byte-identical to the matching control. Twelve- and ten-wave budgets regress (25.56/24.61 ms); fast math changes the image (18.92 ms) and is not selected.
93 lines
3.7 KiB
Diff
93 lines
3.7 KiB
Diff
diff --git a/llvm_zluda/src/lib.cpp b/llvm_zluda/src/lib.cpp
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--- a/llvm_zluda/src/lib.cpp
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+++ b/llvm_zluda/src/lib.cpp
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@@ -485,6 +485,8 @@
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bool AnyFp8 = false;
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for (const Site &S : Sites)
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AnyFp8 |= S.Fp8;
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+ if (PackedFp8 && AnyFp8)
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+ F.addFnAttr("amdgpu-waves-per-eu", "8");
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Type *F32Ty = Type::getFloatTy(F.getContext());
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Value *Scale = ConstantFP::get(F32Ty, AnyFp8 ? 0x1p-16 : 1.0);
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Value *Inverse = ConstantFP::get(F32Ty, AnyFp8 ? 0x1p16 : 1.0);
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@@ -758,6 +760,70 @@
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Call->eraseFromParent();
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}
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+ // A complete pair overwrite needs one conversion. Reads of either
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+ // NVIDIA register, accesses to its rewritten shadow, and block boundaries
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+ // prevent coalescing. Scan after MMA rewriting to include hoisted reads.
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+ DenseMap<AllocaInst *, int> ShadowOwners;
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+ for (size_t Index = 0; Index < Shadows.size(); ++Index)
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+ if (Shadows[Index] != nullptr)
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+ ShadowOwners[Shadows[Index]] = static_cast<int>(Index);
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+ SmallVector<std::pair<StoreInst *, StoreInst *>, 64> StorePairs;
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+ DenseMap<int, StoreInst *> PendingStores;
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+ for (BasicBlock &Block : F)
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+ {
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+ PendingStores.clear();
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+ for (Instruction &I : Block)
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+ {
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+ auto *Load = dyn_cast<LoadInst>(&I);
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+ auto *Store = dyn_cast<StoreInst>(&I);
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+ if (Load == nullptr && Store == nullptr)
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+ continue;
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+ Value *Pointer = Load != nullptr ? Load->getPointerOperand() : Store->getPointerOperand();
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+ auto *Register = dyn_cast<AllocaInst>(Pointer);
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+ auto Shadow = ShadowOwners.find(Register);
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+ if (Shadow != ShadowOwners.end())
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+ {
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+ PendingStores.erase(Shadow->second);
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+ continue;
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+ }
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+ auto Found = Owner.find(Register);
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+ if (Found == Owner.end() || Found->second < 0 || Shadows[Found->second] == nullptr)
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+ continue;
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+ int Index = Found->second;
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+ if (Load != nullptr)
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+ {
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+ PendingStores.erase(Index);
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+ continue;
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+ }
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+ auto Previous = PendingStores.find(Index);
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+ if (Previous != PendingStores.end() && Previous->second->getPointerOperand() != Pointer)
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+ {
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+ StorePairs.push_back({Previous->second, Store});
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+ PendingStores.erase(Previous);
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+ }
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+ else
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+ PendingStores[Index] = Store;
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+ }
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+ }
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+ DenseSet<StoreInst *> CoalescedStores;
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+ for (auto [First, Second] : StorePairs)
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+ {
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+ if (ResultStores.contains(First) || ResultStores.contains(Second))
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+ continue;
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+ auto *Register = cast<AllocaInst>(First->getPointerOperand());
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+ const RegisterPair &Pair = Shadowed[Owner[Register]];
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+ const bool FirstHigh = Register == Pair.High;
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+ IRBuilder<> Builder(Second);
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+ Value *Nv = UndefValue::get(Pair32);
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+ Nv = Builder.CreateInsertElement(Nv, First->getValueOperand(), Builder.getInt8(FirstHigh));
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+ Nv = Builder.CreateInsertElement(Nv, Second->getValueOperand(), Builder.getInt8(!FirstHigh));
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+ Builder.CreateStore(fromNv(Builder, Nv), shadowFor(Pair));
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+ CoalescedStores.insert(First);
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+ CoalescedStores.insert(Second);
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+ First->eraseFromParent();
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+ Second->eraseFromParent();
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+ }
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+
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// Every other access now goes through the shadow.
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for (LoadInst *Load : Loads)
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{
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@@ -770,6 +836,8 @@
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}
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for (StoreInst *Store : Stores)
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{
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+ if (CoalescedStores.contains(Store))
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+ continue;
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if (!ResultStores.contains(Store))
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{
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auto *Register = cast<AllocaInst>(Store->getPointerOperand());
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