ayo
34e6b0fe71
Add an experimental FSR Ray Regeneration backend for D3D12 RR requests: - Convert depth, motion, normals and albedos into AMD denoiser inputs. - Split and recompose diffuse/specular signals, then run Super Sampling. - Add stability/detail controls, demodulation guards and halo limiting. - Handle AMD provider discovery under NVIDIA GPU spoofing. - Add runtime probes, synthetic reference scenes and per-dispatch profiling. Add exact gfx11 DLSS-RR inference using f16 cooperative matrices: - Reproduce FP8 conversions, accumulation and camera reprojection arithmetic. - Widen model weights and avoid requiring VK_EXT_shader_float8. - Extend model building, replay tools and descriptor metadata. Expand motion preprocessing and experimental AW2 native-motion support: - Add tiled LDS dilation, padded allocation handling and thin-only sky fill. - Order dilation with input waits and NGX on the selected stream. - Add jitter-aligned native composition, hybrid routing and wire history repair. - Add prepared masks, sparse repair and independent motion/repair controls. Add optional fused R11G11B10 input/output conversion, sampled stage timings and profile summarization. Extend configuration, packaging, documentation, FidelityFX headers and CPU/GPU regression coverage.
65 lines
4.0 KiB
Python
65 lines
4.0 KiB
Python
"""Fractional wire coverage must preserve a different foreground surface."""
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import os
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from pathlib import Path
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import struct
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import subprocess
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import tempfile
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import unittest
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ROOT=Path(__file__).resolve().parents[1]
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@unittest.skipUnless(os.environ.get('D4R_RUN_GPU_TESTS')=='1','opt-in GPU test')
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class WireBackgroundGpuTests(unittest.TestCase):
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def test_sky_wire_does_not_spill_onto_other_geometry(self):
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runner=os.environ['D4R_DUMP_RUNNER']
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kernel=Path(os.environ.get('D4R_WIRE_TEST_KERNEL',str(ROOT/'build/wine-nvcuda/generated'/'gfx1101.hsaco')))
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w,h=65,67
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pitch,dp,mp=w*8+16,w*4+12,w*4+20
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pixels=w*h
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rgba=struct.pack('<4e',.5,.5,.5,.5)
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observed=struct.pack('<4e',.125,.125,.125,.75)
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current=b''.join(rgba*w+b'\xa5'*16 for _ in range(h))
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color=b''.join(observed*w+b'\xa5'*16 for _ in range(h))
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depth=b''.join(struct.pack('<'+'f'*w,*[
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.5 if y==32 else .9 if x<=31 and y<=31 else 1. for x in range(w)])+b'\xa5'*12 for y in range(h))
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motion=b''.join(bytes(w*4)+b'\xa5'*20 for _ in range(h))
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input_depth=b''.join(struct.pack('<f',.5)*w+b'\xa5'*12 for _ in range(h))
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for sparse in (False,True):
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with self.subTest(sparse=sparse), tempfile.TemporaryDirectory() as temp:
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directory=Path(temp);out=directory/'out';out.mkdir()
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arrays=[current,color,depth,motion,color,b'\xff'*pixels,struct.pack('<f',1.)*pixels,
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b'\xa5'*(pitch*h),b'\xa5'*(pixels+64),b'\xa5'*(pixels*4+64),
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input_depth,b'\xa5'*(pitch*h)]
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if sparse:arrays.append(b'\xa5'*(pixels+64))
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addresses=[(i+1)*0x100000000 for i in range(len(arrays))]
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args=struct.pack('<17Q5I2fI',*addresses[:12],pitch,dp,mp,pitch,dp,w,h,w,h,0,.25,.25,3)
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if sparse:args+=struct.pack('<Q',addresses[12])
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(directory/'args.bin').write_bytes(args)
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manifest=['kernel '+('d4r_wire_history_sparse' if sparse else 'd4r_wire_history'),
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'launch 5 5 1 256 1 1 0',f'args {len(args)}']
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for i,data in enumerate(arrays):
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(directory/f'alloc-{i}.bin').write_bytes(data)
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manifest += [f'alloc {i} {hex(addresses[i])} {len(data)}',f'pointer {168 if i==12 else i*8} {i} 0']
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(directory/'manifest.txt').write_text('\n'.join(manifest)+'\n')
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name='d4r_wire_history_sparse' if sparse else 'd4r_wire_history'
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subprocess.run([runner,str(kernel),name,str(directory),str(out),'1'],check=True,capture_output=True)
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if sparse:
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for i in range(len(arrays)):(directory/f'alloc-{i}.bin').write_bytes((out/f'alloc-{i}.bin').read_bytes())
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manifest[0]='kernel d4r_wire_history_apply'
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(directory/'manifest.txt').write_text('\n'.join(manifest)+'\n')
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subprocess.run([runner,str(kernel),'d4r_wire_history_apply',str(directory),str(out),'1'],check=True,capture_output=True)
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result=(out/f'alloc-{0 if sparse else 7}.bin').read_bytes()
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# The .0625 wire corner overlaps a different, thick foreground object.
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self.assertEqual(result[31*pitch+31*8:31*pitch+32*8],rgba)
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self.assertEqual((out/'alloc-8.bin').read_bytes()[31*w+31],255)
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# The neighboring actual wire remains repairable; alpha stays untouched.
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wire=result[32*pitch+32*8:32*pitch+33*8]
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self.assertNotEqual(wire,rgba)
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self.assertEqual(wire[6:],rgba[6:])
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for i in ((1,2,3,4,5,6,10) if sparse else (0,1,2,3,4,5,6,10)):
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self.assertEqual((out/f'alloc-{i}.bin').read_bytes(),arrays[i])
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for y in range(h):self.assertEqual(result[y*pitch+w*8:(y+1)*pitch],b'\xa5'*16)
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for i,end in ((8,pixels),(9,pixels*4)):
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self.assertEqual((out/f'alloc-{i}.bin').read_bytes()[end:],b'\xa5'*64)
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