ayo
7c5d3c9157
Add native K/M/RR inference engines, HIP kernels, replay and validation harnesses, and Windows DLSS setup and runtime support. Include GPU profiling tools, build and packaging scripts, platform integration patches, and implementation documentation.
91 lines
3.8 KiB
Python
91 lines
3.8 KiB
Python
#!/usr/bin/env python3
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"""Pack a preset F stage's weights, read from the user's nvngx_dlssd.dll (engine/rr/rr2_ref.dll_weights), for
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engine/rr/rr2_m.comp.
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usage: rr2_pack.py STAGE NVNGX_DLSSD_DLL OUT.bin OUT.h
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swin_pack.py's layout: transposed products as 16 x 16 tiles, every tensor's outputs in slot order (slot j holds the
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natural index inter(j)); a merge's or the expand's inputs are sub-positions of C channels each. OUT.h also defines
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the stage's shape for the shader (KIND, C, NH, NB, CM, CL, GUIDE).
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"""
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import os
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import sys
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import numpy as np
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sys.path.insert(0, os.path.dirname(os.path.abspath(__file__)))
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from enc1_ref import inter # noqa: E402
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from enc1_pack import a_tiles, b_tiles, cubic_table, act_table # noqa: E402
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from rr2_ref import STAGES, EXPAND, dll_weights # noqa: E402
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def main():
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stage, dll, out_bin, out_h = sys.argv[1:5]
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w = dll_weights(open(dll, 'rb').read(), stage)
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if stage in EXPAND:
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C, CL, NH, NB = EXPAND[stage]
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kind, CM, guide = 2, 0, 0
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else:
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C, c_up, CM, NH, NB = STAGES[stage]
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kind, CL = (4 if stage == 'enc0' else 5 if stage == 'dec0_1' else 3 if stage.startswith('dec') else 1 if c_up else 0), 0
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guide = 0 if kind >= 3 else 1
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I32, I64, IC = inter(32), inter(64), inter(C)
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e = {}
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if kind == 1:
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e['w1'], e['b1'] = ('A', w['w1'][:, IC]), ('H', w['b1'][IC])
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if kind == 4: # encoder 0's embedding branches
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for b in range(2):
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e[f'ewd{b}'] = ('A', w['ewd'][b][:, I32])
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e[f'ebd{b}'] = ('H', w['ebd'][b][I32])
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e[f'ewu{b}'] = ('A', w['ewu'][b][:, IC])
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e['ebu'] = ('H', w['ebu'][IC])
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if kind == 2:
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I4C = [C * (j // C) + IC[j % C] for j in range(4 * C)]
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e['we'], e['be'] = ('A', w['we'][:, I4C]), ('H', w['be'][I4C])
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for h in range(NH):
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e[f'wqk{h}'] = ('A', w['wqk'][h][:, I32])
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e[f'wv{h}'] = ('B', w['wv'][h][:, I32])
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e[f'wo{h}'] = ('A', w['wo'][h][:, IC])
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e[f'bias{h}'] = ('H', w['bias'][h][np.ix_(I64, I64)]) # [key slot][query slot]; symmetric
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e['bo'] = ('H', w['bo'][IC])
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for b in range(NB):
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e[f'wd{b}'] = ('A', w['wd'][b][:, I32])
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e[f'bd{b}'] = ('H', w['bd'][b][I32])
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e[f'wu{b}'] = ('A', w['wu'][b][:, IC])
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e['bu'] = ('H', w['bu'][IC])
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if CM:
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e['wm'], e['bm'] = ('A', w['wm'][:, inter(CM)]), ('H', w['bm'][inter(CM)])
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if 'wh' in w:
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e['wh'], e['bh'] = ('A', w['wh']), ('H', w['bh'])
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if kind == 5: # dec0's output tail: tanh of every binary16 value, correctly rounded, by its bits
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with np.errstate(all='ignore'):
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x = np.arange(65536, dtype=np.uint32).astype(np.uint16).view(np.float16).astype(np.float64)
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e['tanh'] = ('U', np.tanh(x).astype(np.float16).view(np.uint16))
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e['cubic'] = ('U', cubic_table())
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e['act'] = ('Y', act_table())
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blob, defines = bytearray(), []
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for name, (kd, a) in e.items():
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while len(blob) % 256:
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blob.append(0)
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off = len(blob)
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if kd == 'A':
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blob += a_tiles(a).tobytes()
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elif kd == 'B':
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blob += b_tiles(a).tobytes()
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elif kd == 'Y':
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blob += np.ascontiguousarray(a, np.uint8).tobytes()
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elif kd == 'U':
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blob += np.ascontiguousarray(a, np.uint16).tobytes()
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else:
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blob += np.ascontiguousarray(a, np.float16).tobytes()
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defines.append(f'#define W_{name.upper()} {off}u // {kd} {a.shape}')
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shape = [f'#define KIND {kind}', f'#define C {C}', f'#define NH {NH}', f'#define NB {NB}', f'#define CM {CM}',
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f'#define CL {CL}', f'#define GUIDE {guide}']
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open(out_bin, 'wb').write(bytes(blob))
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open(out_h, 'w').write(f'// generated by engine/rr/rr2_pack.py for {stage}\n' + '\n'.join(shape + defines) + '\n')
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print(f'{stage}: {len(blob)} bytes, {len(e)} entries')
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if __name__ == '__main__':
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main()
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