Add accuracy mode and GLIBC 2.41 release builds

Add default-off PreferAccuracy with conservative native variants for every RDNA3/RDNA4 target and a separate JIT cache. Preserve fast defaults and reject mixed accuracy sets.

Add a pinned Debian build environment, rebuild all release components against GLIBC 2.41, and include toolchain provenance and release notes for the accuracy changes and the preceding artifact/synchronization fixes. Refs #6; CPU-overhead confirmation for #7 remains pending.

kernels/build.sh

@@ -10,15 +10,22 @@
 #   D4R_NATIVE_FP8  1 (RDNA4 only): the variant for ZLUDA's native FP8 WMMA (d4r.ini [Kernels] NativeFp8):
 #                   M's layers on FP8 WMMA with NVIDIA's e4m3 activations, texture tails matching ZLUDA's
 #                   D4R_ZLUDA_WMMA_FP8_NATIVE lowering. K is the same in both variants.
+#   D4R_PREFER_ACCURACY  1: preserve FP8 quantization, per-MMA f16 rounding and denormal handling;
+#                   build a separate set (default output: kernels/out/native/accuracy).
 # Texture kernels (tex) are NVIDIA's PTX with parts replaced, so they additionally need:
 #   D4R_DLSS_DLL    nvngx_dlss.dll 310.7 (its PTX is extracted into kernels/extracted/, never committed)
 #   D4R_ZLUDA_EMIT  ZLUDA's d4r_emit (patches/zluda applied; `cargo build --release -p ptx --example d4r_emit`),
 #                   which compiles PTX offline for D4R_GPU_ARCH (no GPU of that kind needed)
+#   D4R_DLSS_PTX_DIR optional pre-extracted PTX directory for parallel per-target builds
 set -euo pipefail
 
 HERE="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
 WHAT="${1:-all}"
-OUT="$(realpath -m "${2:-$HERE/out/native}")"
+ACCURACY="${D4R_PREFER_ACCURACY:-0}"
+[[ "$ACCURACY" == 0 || "$ACCURACY" == 1 ]] || { echo "D4R_PREFER_ACCURACY must be 0 or 1" >&2; exit 2; }
+DEFAULT_OUT="$HERE/out/native"
+[[ "$ACCURACY" == 1 ]] && DEFAULT_OUT+="/accuracy"
+OUT="$(realpath -m "${2:-$DEFAULT_OUT}")"
 ROCM="${D4R_ROCM_DIR:-/opt/rocm}"
 ARCH="${D4R_GPU_ARCH:-gfx1101}"
 FP8="${D4R_NATIVE_FP8:-0}"
@@ -30,6 +37,14 @@ esac
 CLANG="$ROCM/lib/llvm/bin/clang++"
 [[ -x "$CLANG" ]] || { echo "clang++ not found in $ROCM/lib/llvm/bin (set D4R_ROCM_DIR)" >&2; exit 2; }
 mkdir -p "$OUT"
+case "$WHAT" in all|k|m|tex) ;; *) echo "unknown kernel family: $WHAT" >&2; exit 2 ;; esac
+# Never certify a directory containing older fast binaries as an accuracy set.
+if [[ "$ACCURACY" == 1 ]] && compgen -G "$OUT/*.hsaco" >/dev/null &&
+    { [[ ! -f "$OUT/d4r-accuracy.txt" ]] || [[ "$(cat "$OUT/d4r-accuracy.txt")" != 1 ]]; }; then
+    echo "accuracy kernels need an empty output directory or an existing accuracy set: $OUT" >&2
+    exit 2
+fi
+rm -f "$OUT/d4r-accuracy.txt"
 
 # HIP source -> raw code object (the kernel name inside matches the DLSS kernel it replaces)
 build_hip() {
@@ -39,6 +54,7 @@ build_hip() {
     tmp="$(mktemp -d)"
     # per-kernel compiler flags from a "// d4r-build-flags: ..." line in the source
     flags="$(sed -n 's|^// d4r-build-flags: *||p' "$src")"
+    [[ "$ACCURACY" == 1 ]] && extra+=" -DD4R_ACCURACY"
     # shellcheck disable=SC2086
     (cd "$tmp" && "$CLANG" -x hip --offload-arch="$ARCH" --offload-device-only -O3 $flags $extra -I"$ROCM/include" \
         --rocm-path="$ROCM" --rocm-device-lib-path="$ROCM/amdgcn/bitcode" -I"$(dirname "$src")" \
@@ -59,8 +75,12 @@ if [[ "$WHAT" == all || "$WHAT" == tex ]]; then
     echo "== texture kernels (NVIDIA PTX with native parts)"
     : "${D4R_DLSS_DLL:?set D4R_DLSS_DLL to nvngx_dlss.dll (310.7)}"
     : "${D4R_ZLUDA_EMIT:?set D4R_ZLUDA_EMIT to d4r_emit from a ZLUDA build with patches/zluda}"
-    PTX_DIR="$HERE/extracted/ptx"
-    python3 "$HERE/tools/extract_dlss_ptx.py" "$D4R_DLSS_DLL" "$PTX_DIR"
+    PTX_DIR="${D4R_DLSS_PTX_DIR:-$HERE/extracted/ptx}"
+    if [[ -z "${D4R_DLSS_PTX_DIR:-}" ]]; then
+        python3 "$HERE/tools/extract_dlss_ptx.py" "$D4R_DLSS_DLL" "$PTX_DIR"
+    elif [[ ! -d "$PTX_DIR" ]]; then
+        echo "missing extracted PTX directory: $PTX_DIR" >&2; exit 2
+    fi
     # kernel : source of its native part [: w64 = compiled as wave64 (two CUDA warps per wave; RDNA3 issues
     # FP32 work for all 64 lanes at once). Only for kernels without MMAs; measured faster, bit-identical:
     # post 0.89 -> 0.77 ms, hiluma output 0.905 -> 0.887 ms (downsample was slower as wave64).]
@@ -84,8 +104,10 @@ if [[ "$WHAT" == all || "$WHAT" == tex ]]; then
     done
     for spec in "${specs[@]}"; do
         IFS=: read -r kernel src mode <<< "$spec"
-        D4R_ZLUDA_WAVE64="$([[ "$mode" == w64 ]] && echo 1 || echo 0)" D4R_ROCM_DIR="$ROCM" D4R_GPU_ARCH="$ARCH" \
+        D4R_PREFER_ACCURACY="$ACCURACY" \
+            D4R_ZLUDA_WAVE64="$([[ "$mode" == w64 && "$ACCURACY" == 0 ]] && echo 1 || echo 0)" D4R_ROCM_DIR="$ROCM" D4R_GPU_ARCH="$ARCH" \
             D4R_TEX_FP8="$FP8" D4R_DLSS_PTX_DIR="$PTX_DIR" "$HERE/tex/build_tex.sh" "$kernel" "$src" "$OUT"
     done
 fi
+[[ "$ACCURACY" == 1 ]] && printf '1\n' > "$OUT/d4r-accuracy.txt"
 echo "native kernels in $OUT"