ayo
4334a0c3c4
RDNA4 (experimental; untested on RDNA4 hardware) - kernels/common/wmma_layout.h picks the WMMA operand/accumulator layout per target; K (pwin_*) and M (swin_*) index through it, so the same sources build for gfx11 and gfx12. D4R_WMMA_LAYOUT=12 on gfx11 is a test shim that runs the gfx12 indexing on gfx11 WMMA. - M can use native e4m3 FP8 WMMA on gfx12 (D4R_NATIVE_FP8=1). Texture tails (enc0_tail, dec0_head) get gfx12 f16 and FP8 paths that match ZLUDA's gfx12 lowering. - ZLUDA patch 0007: gfx12 WMMA helpers, optional native FP8 MMA (D4R_ZLUDA_WMMA_FP8_NATIVE), a layout override for testing, and an architecture argument for d4r_emit. Texture kernels are now compiled offline per target through d4r_emit (D4R_ZLUDA_EMIT) instead of on the local GPU. - New d4r.ini option [Kernels] NativeFp8 (default on), wired through the shim and d4r_config.py. On gfx12 the bridge serves kernels/<arch>-fp8 when it is on. - The bridge picks the KFD GPU with the most SIMDs (so an iGPU is not chosen over a discrete GPU); D4R_GPU_ARCH overrides it. - kernels/build.sh and package_release.sh build gfx1100-gfx1103 and gfx1200/gfx1201 (plus -fp8 variants), and D4R_BUNDLE_TEX takes per-target folders. Performance (RDNA3; harness byte-identical unless noted) - ZLUDA patch 0006: m16n8k8 f16 MMAs on WMMA (E; not bit-exact, 52-55 dB per layer, D4R_ZLUDA_WMMA_K8=0 disables it), per-key weight-image slots for native prep kernels (d4r_prep_key_at, d4r_prep_key_slots), and wave64 builds of MMA-free kernels (D4R_ZLUDA_WAVE64). - M: packed FP8 encoding, conflict-free patch-merge reads, scalar weight loads in enc1, and weight prep once per weight set for the six enc3 tube blocks. - K: CU mode for the six non-wide pwin layers. - Texture kernels: every DLSS flag variant is built natively (24 K output, 8 M post, 4 M downsample, 4 M enc0), not only Townfall's; post and K output run as wave64. - M direct output: rrlite_downsample_kernel writes the shim's output buffer; the shim's default direct-output presets are now 11,13. Tools - dump_runner takes the prep grid from d4r_prep_blocks and refuses texture/surface dumps. - New pwin_check.py, swin_check.py, model_enc3.py and tail_check.hip. Docs: README GPU table and RDNA4 notes, building (patches 0002-0007, d4r_emit), native-kernels (RDNA4 section), performance (new numbers), packaging README. Version 0.1.2.
41 lines
2.5 KiB
Bash
41 lines
2.5 KiB
Bash
# Source this to export the environment a Proton process needs to run
|
|
# official DLSS on AMD through d4r (ZLUDA + Wine CUDA bridge + NGX shim).
|
|
# Paths can be overridden before sourcing.
|
|
D4R_RUNTIME_DIR="${D4R_RUNTIME_DIR:-$HOME/.local/share/d4r-dlss}"
|
|
D4R_ZLUDA_DIR="${D4R_ZLUDA_DIR:-$HOME/.cache/d4r-zluda-current}"
|
|
# ROCm user-space runtime: a private copy under ~/.cache if present, otherwise the system /opt/rocm
|
|
if [[ -z "${D4R_ROCM_DIR:-}" ]]; then
|
|
D4R_ROCM_DIR="$HOME/.cache/d4r-rocm-deps/root/opt/rocm"
|
|
[[ -d "$D4R_ROCM_DIR" ]] || D4R_ROCM_DIR=/opt/rocm
|
|
fi
|
|
d4r_winpath() { printf 'Z:%s' "$(printf '%s' "$1" | tr '/' '\\')"; }
|
|
|
|
# dxvk-nvapi on a non-NVIDIA driver, reporting Ada so NGX uploads the FP8
|
|
# network weights that match the sm_89 PTX ZLUDA compiles.
|
|
export PROTON_ENABLE_NVAPI=1
|
|
export DXVK_NVAPI_ALLOW_OTHER_DRIVERS=1
|
|
export DXVK_NVAPI_GPU_ARCH=AD100
|
|
# ZLUDA and the ROCm user-cache runtime.
|
|
export LD_LIBRARY_PATH="$D4R_ZLUDA_DIR:$D4R_ROCM_DIR/lib:$D4R_ROCM_DIR/lib/llvm/lib${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}"
|
|
export D4R_ZLUDA_LIBCUDA="$D4R_ZLUDA_DIR/libcuda.so"
|
|
# Kernels without PTX launch bounds (DLSS's convolutions) are compiled for at
|
|
# most 256-thread blocks, as CUDA itself allows 255 registers for them; the
|
|
# default 1024 bound caps gfx11 waves at 96 VGPRs and makes them spill.
|
|
export D4R_ZLUDA_IMPLICIT_MAX_BLOCK="${D4R_ZLUDA_IMPLICIT_MAX_BLOCK:-256}"
|
|
# f16 tensor-core MMAs (DLSS's convolutions) run on gfx11/gfx12 WMMA instead of a
|
|
# dot-product fallback (patches/zluda/0003 and 0007); 0 selects the fallback.
|
|
export D4R_ZLUDA_WMMA="${D4R_ZLUDA_WMMA:-1}"
|
|
# DLSS frames in flight. The presented upscaled image is this many game frames
|
|
# old at most: 3 = highest frame rate (Townfall ~86 fps, age 2-3), 2 = age 2
|
|
# (~75 fps), 1 = age 1, the lowest possible with the CPU staging path (~53 fps).
|
|
export D4R_SHIM_MAX_IN_FLIGHT="${D4R_SHIM_MAX_IN_FLIGHT:-3}"
|
|
# 1 keeps DLSS inputs and output in VRAM (vkd3d-proton Vulkan interop, no CPU
|
|
# staging): Townfall ~141 fps at age 2-3 with 3 in flight, ~113 fps at age 1
|
|
# with D4R_SHIM_MAX_IN_FLIGHT=1. Needs vkd3d-proton; falls back automatically.
|
|
export D4R_SHIM_VRAM_INTEROP="${D4R_SHIM_VRAM_INTEROP:-0}"
|
|
# Shim configuration (Windows paths inside the prefix).
|
|
export D4R_NVCUDA_BRIDGE="$(d4r_winpath "$D4R_RUNTIME_DIR/bin/nvcuda.dll")"
|
|
export D4R_NGX_CORE="${D4R_NGX_CORE:-$(d4r_winpath "$D4R_RUNTIME_DIR/ngx/_nvngx.dll")}"
|
|
export D4R_NGX_FEATURE_DIR="$(d4r_winpath "$D4R_RUNTIME_DIR/dlss")"
|
|
export D4R_SHIM_LOG="${D4R_SHIM_LOG:-$(d4r_winpath "$D4R_RUNTIME_DIR/d4r_nvngx.log")}"
|