woutermans
3490023668
The remaining two layers (96 channels, four heads) use the same swin_tok.h template: byte-identical on the same recorded launches and harness sequences, enc2 0.22 -> 0.14 ms and dec2 0.20 -> 0.14 ms at 1280x720 render, 0.75 -> 0.47 and 0.69 -> 0.47 ms at 2560x1440. Skipping windows that lie entirely outside the image is also exact but below the measurement noise (at most 2.4% of the windows of every other tube launch), so it is not kept; true16 code generation remains not tried.
21 lines
740 B
Plaintext
21 lines
740 B
Plaintext
// fast numerics: intermediate activations f16 (no FP8 re-quantisation), f32 accumulation through GEMM chains
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// RX 7700 XT: memory-clause scheduling at the 192 VGPR cap; byte-identical to the default build, gfx1101 only
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// d4r-build-flags-gfx1101: -mllvm -misched=gcn-max-memory-clause
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#define SWIN_NO_Q8
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#define SWIN_F32ACC
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#ifndef SWIN_MAX_VGPR
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#define SWIN_MAX_VGPR 192
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#endif
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#ifndef SWIN_MLP_R
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#define SWIN_MLP_R(NW) 2
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#endif
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// RDNA4 native FP8 builds use the token-lane block (swin_tok.h); -DSWIN_NO_TOKEN_LANES keeps swin_block.h
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#ifndef SWIN_NO_TOKEN_LANES
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#define SWIN_TOKEN_LANES
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#endif
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#include "swin_block.h"
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#ifndef SWIN_NW
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#define SWIN_NW 8
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#endif
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SWIN_MODULE_W(rrlite_dec2_4x4, 96, 4, SWIN_NW, 0, false, CommonParams, 128)
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