ayo
b645ef9096
- Add default-off PreferAccuracy for all native kernel families, including RDNA4 FP8 variants. - Restore intermediate FP8 quantization, per-MMA FP16 rounding, denormal handling and NGX synchronization in accuracy mode. - Select separately marked accuracy kernels and use a separate JIT cache; reject mixed sets and never silently substitute fast kernels. - Add a pinned GLIBC 2.41 build environment for ZLUDA/LLVM, the DLLs and both kernel sets, with ABI checks and toolchain provenance. - Support parallel target builds and pre-extracted PTX; correct ROCm header paths and Clang-CL input handling. - Bump to 0.1.3 and update release notes, documentation and tests. Validation: 11 tests passed; all 912 kernels built; E/K/M GPU harness runs completed with accuracy off/on. Packaged libraries loaded under GLIBC 2.41 and require no GLIBC version newer than 2.38. RTX image-quality parity remains unverified. Fixes #6 Refs #6
38 lines
2.5 KiB
Bash
Executable File
38 lines
2.5 KiB
Bash
Executable File
#!/usr/bin/env bash
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# build_tex.sh KERNEL SRC OUT_DIR: one texture kernel. NVIDIA's PTX for KERNEL, edited by make_ptx.py so
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# part of it calls functions from SRC.hip, is compiled by ZLUDA with SRC's bitcode linked in
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# (D4R_ZLUDA_EXTRA_BC) and the resulting code object is saved as OUT_DIR/KERNEL.hsaco.
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# Called by kernels/build.sh, which sets D4R_ROCM_DIR, D4R_GPU_ARCH, D4R_DLSS_PTX_DIR, D4R_ZLUDA_EMIT,
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# D4R_ZLUDA_WAVE64 (1 = wave64 code object) and D4R_TEX_FP8 (1 = the gfx12 native-FP8 variant).
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# ZLUDA compiles offline for D4R_GPU_ARCH with its d4r_emit tool, so any target builds on any machine.
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set -euo pipefail
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K=$1 SRC=$2 OUT=$3
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D="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
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R="${D4R_ROCM_DIR:-/opt/rocm}"
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ARCH="${D4R_GPU_ARCH:-gfx1101}"
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FP8="${D4R_TEX_FP8:-0}"
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ACCURACY="${D4R_PREFER_ACCURACY:-0}"
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LLVM="$R/lib/llvm/bin"
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B="$(mktemp -d)"
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trap 'rm -rf "$B"' EXIT
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# D4R_TEX_CFLAGS: extra flags for SRC.hip (tests, e.g. -DD4R_WMMA_LAYOUT=12 for the gfx12-layout shim on gfx11)
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read -r -a FLAGS <<< "${D4R_TEX_CFLAGS:-}"
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[[ "$FP8" == 1 ]] && FLAGS+=(-DD4R_TEX_FP8)
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[[ "$ACCURACY" == 1 ]] && FLAGS+=(-DD4R_ACCURACY)
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# SRC.hip -> bitcode without target attributes, so ZLUDA's own target settings apply after linking
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"$LLVM/clang++" -x hip -std=c++20 -nogpuinc -nogpulib -O3 -mno-wavefrontsize64 --offload-device-only \
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--offload-arch="$ARCH" -fgpu-rdc -emit-llvm -c -Xclang -fdenormal-fp-math=dynamic -DD4R_KERNEL_NAME="$K" \
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"${FLAGS[@]}" -o "$B/raw.bc" "$D/$SRC.hip"
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"$LLVM/llvm-dis" "$B/raw.bc" -o "$B/raw.ll"
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sed -E -e '/@llvm.used/d' -e '/wchar_size/d' -e '/llvm.module.flags/d' -e '/__hip_cuid/d' -e 's/optnone//g' \
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-e "s/\"target-cpu\"=\"$ARCH\"//g" -e 's/"target-features"="[^"]+"//g' "$B/raw.ll" | "$LLVM/llvm-as" -o "$B/extra.bc" -
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D4R_PREFER_ACCURACY="$ACCURACY" python3 "$D/make_ptx.py" "$K" "$B/$K.ptx" >/dev/null
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# the code-generation switches of the runtime (d4r.ini [Kernels]), which ZLUDA's module cache keys on
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env LD_LIBRARY_PATH="$R/lib" D4R_ZLUDA_EXTRA_BC="$B/extra.bc" D4R_ZLUDA_WMMA=1 D4R_ZLUDA_WMMA_FP8=1 \
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D4R_ZLUDA_WMMA_FP8_NATIVE="$FP8" D4R_ZLUDA_IGNORE_DENORMAL="$((1 - ACCURACY))" \
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D4R_ZLUDA_WMMA_F32ACC=0 D4R_ZLUDA_FAST_MATH=0 D4R_ZLUDA_IMPLICIT_MAX_BLOCK=256 \
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D4R_ZLUDA_WAVE64="$([[ "$ACCURACY" == 1 ]] && echo 0 || echo "${D4R_ZLUDA_WAVE64:-0}")" \
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"$D4R_ZLUDA_EMIT" "$B/$K.ptx" "$B/dump" "$ARCH" >/dev/null
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cp "$B/dump/module.hsaco" "$OUT/$K.hsaco"
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printf '%-52s %s\n' "$K" "$(grep -E '^\s+\.(vgpr_count|private_segment_fixed_size|wavefront_size):' "$B/dump/asm.s" | tr -s ' ' | paste -sd' ')"
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