woutermans
e0d1549a21
A standalone Vulkan inference engine (engine/) for DLSS presets K and M that runs from weights extracted from the user's own nvngx_dlss.dll, with d4r's own input, network and reconstruction shaders or the native HIP network layers, recorded into the game's command list by the shim. Opt-in ([Engine] Enabled / D4R_ENGINE=1); anything uncovered falls back to the CUDA/ZLUDA path with the reason logged. Byte-identical to NGX's CUDA backend under the phase-capable reference (1706x960 -> 2560x1440, native HIP network, eleven frames, RX 9070 XT): - K render- and display-resolution motion vectors, HDR and LDR - K game-supplied exposure and automatic exposure with any pre-exposure and exposure scale (one residual: effective exposure exactly 2 or 4) - K and M with the DLSS indicator's inverted-axis parameters - M with any exposure settings (NGX ignores them for M) K packages need the current compile_k.py (marker D4RO0003). Also: HIP shared buffers are pooled across feature recreation (ROCm leaks destroyed imports), hipnet.bin must match the preset, M-only games do not load the K model, install_d4r_runtime.sh stages k, k-ldr, m, m-ldr with hip/, the activation table has a generator (gen_activation_m.py), and package_release.sh can bundle the engine's shaders (never its weights). Signed-off-by: woutermans <[email protected]>
23 lines
1.1 KiB
GLSL
23 lines
1.1 KiB
GLSL
// Match formatted CUDA stores before the Vulkan image conversion. The reference rounds halfway away from
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// zero; feeding an exact normalized code to imageStore also avoids implementation-specific UNORM/SNORM rounding.
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vec4 unorm8Value(vec4 v) {
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v = clamp(mix(v, vec4(0.0), isnan(v)), 0.0, 1.0);
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precise vec4 scaled = v * 255.0;
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return floor(scaled + 0.5) * (1.0 / 255.0);
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}
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vec4 snorm8Value(vec4 v) {
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v = clamp(mix(v, vec4(0.0), isnan(v)), -1.0, 1.0);
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precise vec4 scaled = abs(v) * 127.0;
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return sign(v) * floor(scaled + 0.5) * (1.0 / 127.0);
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}
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vec3 unorm10Value(vec3 v) {
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v = clamp(mix(v, vec3(0.0), isnan(v)), 0.0, 1.0);
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precise vec3 scaled = v * 1023.0;
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precise vec3 code = floor(scaled + 0.5);
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precise vec3 value = code * (1.0 / 1023.0);
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// CUDA's float-backed formatted surface stores code/1023 with correctly rounded division. RADV lowers
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// even precise constant division to reciprocal multiplication (24/1024 codes differ by one ulp).
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// Correct the quotient with its fused residual; all 1024 normalized codes then match bit-for-bit.
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return fma(fma(value, vec3(-1023.0), code), vec3(1.0 / 1023.0), value);
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}
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