Add experimental packed and in-place DLSS output
- Tag redirected surfaces as R10G10B10A2 ('R3') as well as RGBA16F ('R2'), and
let the native output kernel store the game's R10G10B10A2 texels itself.
- Import linear, exportable game textures (vkd3d-proton patch 0003) into HIP
so the output kernel writes the game's output texture with no game-side copy.
- Add ID3D12DXVKInteropDeviceD4R3 with GetVulkanLinearImageInfo.
- Gate both paths behind D4R_SHIM_OUTPUT_PACKED and D4R_SHIM_INPLACE, and use
them only for split frames of preset M whose output kernel honours the redirect.
- Convert on the host when a recorded packed frame finds the wrong kernel.
- Give the harness an R10G10B10A2 output, and add D4R_SHIM_SPIN_POLL so
frame timing is not quantised to the poll sleep.
- Document the measured removal of the output copies in performance.md.
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@@ -299,9 +299,23 @@ extern "C" __attribute__((device)) int __ockl_image_width_2D(tsharp_t* image);
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extern "C" __attribute__((device)) int __ockl_image_height_2D(tsharp_t* image);
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__attribute__((device)) static inline uint32_t redirect_pitch(uint64_t surface)
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{
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// 'R2' tag in the high half (other handles may have data there), row pitch / 8 in the low half
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// 'R2' (RGBA16F texels) or 'R3' (R10G10B10A2_UNORM texels) tag in the high half (other handles may have
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// data there), row pitch / 8 in the low half
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const uint32_t word = ((const __attribute__((address_space(4))) uint32_t*)surface)[21];
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return (word >> 16) == 0x5232u ? (word & 0xffffu) << 3 : 0u;
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return (word >> 16) == 0x5232u || (word >> 16) == 0x5233u ? (word & 0xffffu) << 3 : 0u;
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}
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__attribute__((device)) static inline bool redirect_rgb10a2(uint64_t surface)
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{
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return (((const __attribute__((address_space(4))) uint32_t*)surface)[21] >> 16) == 0x5233u;
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}
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// One channel as the game-side path produces it: the f32 value rounded toward zero to a half (the RGBA16F
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// store), then converted to UNORM by a blit (NaN and negatives 0, clamped at 1, rounded to nearest).
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__attribute__((device)) static inline uint32_t redirect_unorm(uint16_t half, float scale)
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{
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float value = (float)__builtin_bit_cast(_Float16, half);
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value = value > 0.0f ? value : 0.0f;
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value = value < 1.0f ? value : 1.0f;
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return (uint32_t)(value * scale + 0.5f);
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}
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// D4R_AS1_STORES: redirect stores through address-space-1 pointers (global_store instead of flat_store; the
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// redirect target is linear device memory)
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@@ -332,7 +346,12 @@ DEV __attribute__((always_inline)) void d4r_sust_p_v4b32(uint64_t surface, int32
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{
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const uint32_t lo = __builtin_bit_cast(uint32_t, __builtin_amdgcn_cvt_pkrtz(__builtin_bit_cast(float, a), __builtin_bit_cast(float, b)));
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const uint32_t hi = __builtin_bit_cast(uint32_t, __builtin_amdgcn_cvt_pkrtz(__builtin_bit_cast(float, c), __builtin_bit_cast(float, d)));
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*D4R_REDIRECT_PTR(uint2_t, redirect_row(surface, y) + 8 * x) = (uint2_t){lo, hi};
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if (redirect_rgb10a2(surface))
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*D4R_REDIRECT_PTR(uint32_t, redirect_row(surface, y) + 4 * x) =
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redirect_unorm((uint16_t)lo, 1023.0f) | redirect_unorm((uint16_t)(lo >> 16), 1023.0f) << 10 |
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redirect_unorm((uint16_t)hi, 1023.0f) << 20 | redirect_unorm((uint16_t)(hi >> 16), 3.0f) << 30;
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else
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*D4R_REDIRECT_PTR(uint2_t, redirect_row(surface, y) + 8 * x) = (uint2_t){lo, hi};
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}
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return;
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}
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@@ -435,8 +454,9 @@ DEV __attribute__((always_inline)) void d4r_sust_b32(uint64_t surface, int32_t x
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tsharp_t* image = (tsharp_t*)surface;
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if (redirect_pitch(surface) != 0)
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{
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// raw bits at byte offset x (RGBA16F rows are 8 bytes per pixel)
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if (x >= 0 && (x & 3) == 0 && redirect_inside(surface, x >> 3, y))
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// raw bits at byte offset x (RGBA16F rows are 8 bytes per pixel); the shim only asks for packed
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// RGB10A2 texels from kernels without raw stores
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if (!redirect_rgb10a2(surface) && x >= 0 && (x & 3) == 0 && redirect_inside(surface, x >> 3, y))
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*D4R_REDIRECT_PTR(uint32_t, redirect_row(surface, y) + x) = data;
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return;
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}
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