kernels: build the denoiser's output kernel natively, authorized separately
Ray Reconstruction's eleven DLSS-D Swin layers still run ZLUDA's compile of NVIDIA's PTX; at 1280x720 -> 3840x2160 on gfx1201 they are 30.2 of a 31.6 ms frame. The denoiser's high-fidelity output kernel is the first one with a native replacement: make_ptx.py replaces its whole-texel RGBA16F store (sust.b.2d.v4.b16.zero) through d4r_sust_v4b16, kernels/build.sh builds the pair as the `rr` family, and packaging builds it into every target folder including the RDNA4 FP8 ones. Both libraries define modules named cuda_dldn_engine_*, with different text, so one manifest cannot take the union of their hashes: kernel_manifest.py now takes the denoiser DLL as --rr-dll and lets only its hashes authorize a cuda_dldn_engine_* binary, and package_release.sh passes it when the denoiser is bundled. Verified in the D3D12 harness with Ray Reconstruction at 1280x720 -> 3840x2160: the output kernel drops from 1.44 to 1.00 ms/frame and the 66 MB raw output is byte-identical to the run with every kernel translated. docs/native-kernels.md gains the denoiser family, the per-kernel cost table and the instruction counts that show why the Swin layers are the remaining work.
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@@ -261,6 +261,39 @@ DEV __attribute__((always_inline)) void d4r_sust_v2b16(uint64_t surface, int32_t
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sust_v2b16_generic(surface, x, y, a, b);
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}
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typedef int16_t v4s __attribute__((ext_vector_type(4)));
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extern "C" __attribute__((device)) void __zluda_ptx_impl_surfobj_b_2d_v4_b16_zero(uint64_t surface, v2i coord, v4s value);
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__attribute__((device, noinline)) static void sust_v4b16_generic(uint64_t surface, int32_t x, int32_t y,
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uint16_t a, uint16_t b, uint16_t c, uint16_t d)
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{
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__zluda_ptx_impl_surfobj_b_2d_v4_b16_zero(surface, (v2i){x, y},
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(v4s){(int16_t)a, (int16_t)b, (int16_t)c, (int16_t)d});
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}
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FP_BODY void sust_rgba16f_body(tsharp_t* image, int32_t px, int32_t y,
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uint16_t a, uint16_t b, uint16_t c, uint16_t d)
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{
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__ockl_image_store_2D(image, (v2i){px, y},
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(v4f){half_bits_to_float(a), half_bits_to_float(b),
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half_bits_to_float(c), half_bits_to_float(d)});
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}
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// RR stores complete RGBA16F texels. No channel reads or partial-pixel merges
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// are needed; other layouts retain the generic byte-addressed store.
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DEV __attribute__((always_inline)) void d4r_sust_v4b16(uint64_t surface, int32_t x, int32_t y,
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uint16_t a, uint16_t b, uint16_t c, uint16_t d)
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{
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tsharp_t* image = (tsharp_t*)surface;
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if (__ockl_image_channel_data_type_2D(image) == 14 && __ockl_image_channel_order_2D(image) == 8 && (x & 7) == 0)
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{
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if (x >= 0)
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sust_rgba16f_body(image, x >> 3, y, a, b, c, d);
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}
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else
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sust_v4b16_generic(surface, x, y, a, b, c, d);
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}
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// f32 comparisons on the bits (no fcmp: kernels ZLUDA compiles in strict-FP mode cannot lower
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// constrained fcmp); same results as the float compares, -0.0 included
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