Merge upstream RDNA4 layouts and validate native Windows K integration
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@@ -5,12 +5,19 @@
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// needed. Definitions below mirror public HIP qualifiers and LLVM AMDGPU
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// work-item/grid builtins. The normal Linux HIP include path is untouched.
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#define __device__ __attribute__((device))
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#define __host__ __attribute__((host))
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#define __global__ __attribute__((global))
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#define __shared__ __attribute__((shared))
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#define __constant__ __attribute__((constant))
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#define __forceinline__ __attribute__((always_inline)) inline
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#define __launch_bounds__(n) __attribute__((amdgpu_flat_work_group_size(1, n)))
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struct d4r_device_dim3 { unsigned x, y, z; };
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// Public HIP vector storage ABI used by M's packed global/LDS accesses.
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struct alignas(8) uint2 { unsigned x, y; };
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struct alignas(16) uint4 { unsigned x, y, z, w; };
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static_assert(sizeof(uint2) == 8 && alignof(uint2) == 8, "HIP uint2 ABI");
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static_assert(sizeof(uint4) == 16 && alignof(uint4) == 16, "HIP uint4 ABI");
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__device__ __forceinline__ d4r_device_dim3 d4r_thread_idx() {
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return {__builtin_amdgcn_workitem_id_x(), __builtin_amdgcn_workitem_id_y(),
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__builtin_amdgcn_workitem_id_z()};
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