Execute native Windows K DLSS and validate real transformer weights
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@@ -30,12 +30,55 @@ __device__ __forceinline__ uint32_t lane_id()
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typedef wm_op op_t; // WMMA operand: u8v (gfx11) or u4v (gfx12)
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// The CUDA fragment reduction rounds products and every tree node to f16.
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// A float sum of the squared halves changes rsqrt and can amplify differences
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// through attention. The strict baseline preserves its channel grouping.
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template <int C>
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__device__ __forceinline__ half_t l2_sum(const half_t* row)
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{
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#ifdef D4R_K_FP16_BASELINE
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static_assert(C % 32 == 0 && C <= 160, "audited K channel counts");
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hv2 partial[4];
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#pragma unroll
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for (int t = 0; t < 4; ++t)
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{
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hv2 halves[2];
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#pragma unroll
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for (int parity = 0; parity < 2; ++parity)
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{
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hv2 pairs[C / 32];
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#pragma unroll
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for (int group = 0; group < C / 32; ++group)
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{
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const hv2 a = *(const hv2*)(row + 2 * t + 8 * parity + 32 * group);
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const hv2 b = *(const hv2*)(row + 2 * t + 8 * parity + 32 * group + 16);
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pairs[group] = (a * a) + (b * b);
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}
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hv2 value = pairs[0];
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if constexpr (C >= 64) value = value + pairs[1];
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if constexpr (C == 96) value = value + pairs[2];
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if constexpr (C >= 128) value = value + (pairs[2] + pairs[3]);
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if constexpr (C == 160) value = value + pairs[4];
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halves[parity] = value;
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}
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partial[t] = halves[0] + halves[1];
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}
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const hv2 sum = (partial[0] + partial[1]) + (partial[2] + partial[3]);
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return sum[0] + sum[1];
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#else
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float sum = 0;
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#pragma unroll
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for (int c = 0; c < C; ++c) sum += (float)(half_t)(row[c] * row[c]);
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return (half_t)sum;
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#endif
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}
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// one k16 step with the f16 accumulator of NVIDIA's f16 wmma (rounded after the step)
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// PWIN_F32ACC: keep the accumulator in f32 through the chain (rounded to f16 where the values are used)
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__device__ __forceinline__ f8v mma16(const op_t& a, const op_t& b, f8v c)
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{
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f8v d = wm_mma(a, b, c);
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#ifndef PWIN_F32ACC
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#if !defined(PWIN_F32ACC) || defined(D4R_K_FP16_BASELINE)
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#pragma unroll
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for (int i = 0; i < 8; ++i)
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d[i] = (float)(half_t)d[i];
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+1
-11
@@ -259,17 +259,7 @@ __device__ void pwin_core(const PwinParams& p, const u8v* __restrict__ img, cons
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STAMP(1);
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// ---- L2 norm: h1 = x0 * (rsqrt(sum x0^2) * gamma1) -> hb
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float ss = 0.0f;
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for (int kt = 0; kt < KT; ++kt)
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{
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const u8v xv = lds_row16(arow + 16 * kt);
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#pragma unroll
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for (int c = 0; c < 16; ++c)
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{
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const half_t v = op_get(xv, c);
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ss += (float)(half_t)(v * v);
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}
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}
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const half_t ss = l2_sum<C>(arow);
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const half_t r16 = (half_t)__builtin_amdgcn_rsqf((float)(half_t)ss);
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for (int kt = (int)hf; kt < KT; kt += 2)
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{
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+1
-12
@@ -19,18 +19,7 @@ __device__ void pos_core(const PwinParams& p, const u8v* __restrict__ img, const
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{
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const half_t* arow = act[16 * (wv * MT + mi) + m];
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half_t* hrow = hb[16 * (wv * MT + mi) + m];
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float ss = 0.0f;
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#pragma unroll
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for (int kt = 0; kt < KT; ++kt)
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{
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const u8v xv = lds_row16(arow + 16 * kt);
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#pragma unroll
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for (int c = 0; c < 16; ++c)
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{
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const half_t v = op_get(xv, c);
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ss += (float)(half_t)(v * v);
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}
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}
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const half_t ss = l2_sum<C>(arow);
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const half_t r16 = (half_t)__builtin_amdgcn_rsqf((float)(half_t)ss);
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for (int kt = (int)hf; kt < KT; kt += 2)
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{
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+1
-11
@@ -38,17 +38,7 @@ __device__ void wide_core(const PwinParams& p, const u8v* __restrict__ img, cons
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half_t* hrow = hb[tok];
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// ---- L2 norm: h1 = x0 * (rsqrt(sum x0^2) * gamma1) -> hb (all groups of a token tile compute the sum)
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float ss = 0.0f;
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for (int kt = 0; kt < KT; ++kt)
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{
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const u8v xv = lds_row16(arow + 16 * kt);
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#pragma unroll
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for (int c = 0; c < 16; ++c)
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{
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const half_t v = op_get(xv, c);
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ss += (float)(half_t)(v * v);
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}
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}
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const half_t ss = l2_sum<C>(arow);
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const half_t r16 = (half_t)__builtin_amdgcn_rsqf((float)(half_t)ss);
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for (int kt = 2 * g + (int)hf; kt < KT; kt += 2 * NG)
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{
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