Hardware e4m3 in the texture tails: enc0 tail and dec0 head

On the gfx12 native-FP8 path the enc0 tail and the dec0 head encode their results with v_cvt_pk_fp8_f32 on the f32 copies of the f16 values (e4m3x4_f32 in tex_common.h) instead of ZLUDA's integer e4m3x2. The clamps keep the conversion in range: +-2pi for enc0 (the f16 bound hi[0], same in f32) and +-448 for dec0, both as a median of three, where a NaN gives the lower bound. The codes equal e4m3x2 for every non-NaN f16, checked over all 65536 patterns on an RX 9070 XT; a NaN in dec0 now encodes as -448 instead of the NaN code. Harness frames are byte-identical in both sets (LDR and HDR, motion vectors at render and display resolution). dec0: 0.21 -> 0.15 ms at 1280x720 render and 0.74 -> 0.53 ms at 2560x1440; enc0 changes by 1-2% (its time is ZLUDA's compile of the feature code). -DD4R_TEX_SOFT_E4M3 (D4R_TEX_CFLAGS) keeps e4m3x2.
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woutermans committed 2026-10-06 23:25:14 +02:00
1 parent 3490023668
commit 5198fd38b3
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@@ -88,6 +88,16 @@ DEV void d4r_enc0_tail(uint32_t smem, uint64_t wp, uint64_t outp, uint32_t dimx,
for (int i = 0; i < 8; ++i)
cf[i] = (float)acc[i];
}
#ifdef D4R_TEX_HW_E4M3
// cf holds the f16 results as f32; the clamp to the f16 +-2pi bounds is the same in f32 (median of
// three: a NaN gives the lower bound, as maximumnum / minimumnum do), and keeps the conversion in range
const float bound = (float)hi[0];
#pragma unroll
for (int i = 0; i < 8; ++i)
cf[i] = __builtin_amdgcn_fmed3f(cf[i], -bound, bound);
E[p][0] = e4m3x4_f32(cf[0], cf[1], cf[2], cf[3]);
E[p][1] = e4m3x4_f32(cf[4], cf[5], cf[6], cf[7]);
#else
uint32_t codes[4];
#pragma unroll
for (int k = 0; k < 4; ++k)
@@ -98,6 +108,7 @@ DEV void d4r_enc0_tail(uint32_t smem, uint64_t wp, uint64_t outp, uint32_t dimx,
}
E[p][0] = codes[0] | (codes[1] << 16);
E[p][1] = codes[2] | (codes[3] << 16);
#endif
}
// plane pl, word 4 j + q = columns 2q, 2q + 1 of tile (2 pl, j) then of tile (2 pl + 1, j) (tile (p, j) =