docs: the denoiser layers' measured launch shape and parameter sizes

docs/native-kernels.md

@@ -91,6 +91,8 @@ Measured on the RX 9070 XT (gfx1201, RDNA4), Ray Reconstruction preset E, 1280×
 
 The denoiser's Swin block is the same block as presets L/M's: `cuda_dldn_engine_swin_enc0_kernel` computes position-only attention `S = bias + Q*Q^T` with no K projection, a 16x16 f16 bias table at 512 bytes per head, and one fused Q/V projection - the score `mma` at line 8406 takes both of its operands from the same accumulator registers, `%r1900`/`%r1920`, through their `cvt.rn.satfinite.e4m3x2.f16x2` at 8126/8129 and 8294/8297. That is `kernels/m/swin_block.h`'s block (`T16 S = bias; k32(S, a0, a0, a1, a1);`), not `kernels/k`'s learned-attention one. So the native denoiser layers can be built by instantiating that template - a prep that permutes the denoiser's own weight image into its slot layout, a parameter struct for the 144-byte block, and the surface stores through `tex_common.h` - rather than by writing a Swin block from scratch.
 
+Measured launch shape, from the replay manifest of a real harness frame: `cuda_dldn_engine_swin_enc0_kernel` and `..._dec0_kernel` are both launched with grid (161, 93, 1) and block (32, 1, 1) - one warp per block, 14973 blocks, one 8x8 token patch each (161 = (1280+8)/8, 93 = 736/8) - so there is no wave index in either; tid.y and tid.z are zero. The parameter block is 1032 bytes for enc0 and 152 for dec0, so it is not one shared struct: enc0 takes the guide textures at +160 through +512, dec0 the three at +88/+96/+104. dec0's dumped allocations are the 65 945 600-byte plane arena and a 47872-byte weight image (the spec tool's 47376 again plus an unpadded tail). The native override can set block.z and flatten the grid per kernel (`d4r_block_z`, `d4r_grid_x`), so a native replacement is free to use more waves per block than one.
+
 `kernels/rr/rr_layer_spec.py` recovers a layer's structure from the corpus PTX alone: `rr_layer_spec.py enc0` prints the phase table (each maximal run of adjacent `mma`, with M/N/K derived from the fragment counts and the accumulator dataflow, the weight and bias byte offsets it reads, and the size of the epilogue between phases) and the stage classification; `--geometry` does the same for all eleven layers and prints each one's weight image extent. It is how enc0's layout above was established, and it is the reference the native layers are written against.
 
 The eleven Swin layers are 30.2 of those 31.6 ms. They are instruction-bound, not MMA-bound: the compiled `enc0` kernel is 83 373 instructions per thread for 536 FP8 WMMAs (0.6% of the stream), and the frame reaches about 6% of the card's FP8 WMMA peak. The stream is 13 k operand-gather shuffles (`ds_bpermute`/`v_perm`/`permlane`), 15 k packed 16-bit ops from the software `cvt.rn.satfinite.e4m3x2.f16x2` requantization, 9 k selects and 13 k ALU-dependency waits. `D4R_ZLUDA_IMPLICIT_MAX_BLOCK` (256 in the shipped config), `D4R_ZLUDA_SCHED_STRATEGY` and a 128-thread bound move the total by under 3%; a 128-thread bound additionally fails the launches of kernels that use larger blocks, and the whole-module wave64 switch produces no launches at all. Removing the gather and the codec — what a native layer does — is the remaining work.