Improve GPU compatibility, RDNA2 kernels and startup diagnostics
- Match render/compute adapters and gate RR models by GPU capabilities - Add RDNA2 native texture kernels and fix FP16 rounding - Harden model builds, cache validation and packaging - Add startup tracing, timeouts, documentation and regression tests
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"""RDNA2 (gfx103x) native hiluma kernels: build gating, packaging allowlist and the f16 rounding contract.
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Run: python3 -m unittest tests.test_rdna2_native_output -v
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The compile checks need ROCm's clang (D4R_ROCM_DIR, default /opt/rocm) and are skipped without it. The full
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texture build additionally needs the extracted DLSS 310.7 PTX (kernels/extracted/ptx) and
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D4R_RUN_KERNEL_BUILD_TESTS=1, since it compiles all twelve kernels.
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Arithmetic equality with ZLUDA's compile is checked in the harness (docs/native-kernels.md), not here.
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"""
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import os
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from pathlib import Path
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import re
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import shutil
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import subprocess
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import tempfile
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import unittest
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ROOT = Path(__file__).resolve().parents[1]
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ROCM = Path(os.environ.get("D4R_ROCM_DIR", "/opt/rocm"))
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CLANG = ROCM / "lib/llvm/bin/clang++"
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PTX_DIR = ROOT / "kernels/extracted/ptx"
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TOOLS = [shutil.which(t) for t in ("llvm-readelf", "llvm-objdump")]
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OUTPUTS = {f"hiluma_engine_output_{d}_{mv}_hdr_max_v2_rel" for d in ("depthinv", "depthreg") for mv in ("mvhi", "mvlo")}
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INPUTS = {f"hiluma_engine_input_{d}_{mv}_{r}_v2_rel"
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for d in ("depthinv", "depthreg") for mv in ("mvhi", "mvlo") for r in ("hdr", "ldr")}
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# cvt.rn.f16.f32 of an fma (and the packed form of a product) of widened f16 values: LLVM would fold the
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# conversion into v_fma_mixlo/mixhi_f16, which rounds once instead of twice
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TINY_PTX = """.version 8.0
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.target sm_80
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.address_size 64
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.visible .entry tiny(
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.param .align 8 .b8 tiny_param_0[16]
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)
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{
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.reg .b16 %rs<6>;
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.reg .f32 %f<8>;
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.reg .b32 %r<3>;
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.reg .b64 %rd<3>;
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ld.param.u64 %rd1, [tiny_param_0];
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cvta.to.global.u64 %rd2, %rd1;
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ld.global.u16 %rs2, [%rd2+8];
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ld.global.u16 %rs3, [%rd2+10];
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ld.global.u16 %rs4, [%rd2+12];
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cvt.f32.f16 %f3, %rs2;
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cvt.f32.f16 %f4, %rs3;
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cvt.f32.f16 %f5, %rs4;
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fma.rn.f32 %f2, %f3, %f4, %f5;
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cvt.rn.f16.f32 %rs1, %f2;
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mul.rn.f32 %f6, %f3, %f4;
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cvt.rn.f16x2.f32 %r1, %f6, %f2;
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st.global.u16 [%rd2], %rs1;
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st.global.u32 [%rd2+4], %r1;
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ret;
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}
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"""
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def run(*args, **kwargs):
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return subprocess.run([str(a) for a in args], text=True, capture_output=True, **kwargs)
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class Rdna2BuildGating(unittest.TestCase):
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def setUp(self):
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self.temp = tempfile.TemporaryDirectory()
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self.addCleanup(self.temp.cleanup)
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self.root = Path(self.temp.name)
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# a compiler that fails if anything reaches it: the refusals must come first
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compiler = self.root / "rocm/lib/llvm/bin/clang++"
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compiler.parent.mkdir(parents=True)
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compiler.write_text("#!/bin/sh\nexit 99\n")
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compiler.chmod(0o755)
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def test_wmma_families_are_refused_on_every_rdna2_target(self):
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for arch in ("gfx1030", "gfx1032", "gfx1036"):
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for family in ("m", "l", "rr", "rrswin"):
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env = dict(os.environ, D4R_ROCM_DIR=str(self.root / "rocm"), D4R_GPU_ARCH=arch)
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result = run("bash", ROOT / "kernels/build.sh", family, self.root / "out", env=env)
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self.assertEqual(result.returncode, 2, (arch, family, result.stderr))
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self.assertIn("need WMMA", result.stderr)
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def test_rdna2_texture_build_does_not_need_zluda(self):
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env = dict(os.environ, D4R_ROCM_DIR=str(self.root / "rocm"), D4R_GPU_ARCH="gfx1032",
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D4R_DLSS_DLL=str(self.root / "missing.dll"), D4R_DLSS_PTX_DIR=str(self.root / "no-ptx"))
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env.pop("D4R_ZLUDA_EMIT", None)
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result = run("bash", ROOT / "kernels/build.sh", "tex", self.root / "out", env=env)
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self.assertNotIn("D4R_ZLUDA_EMIT", result.stderr)
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self.assertIn("missing extracted PTX directory", result.stderr)
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def test_rdna3_texture_build_still_needs_zluda(self):
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env = dict(os.environ, D4R_ROCM_DIR=str(self.root / "rocm"), D4R_GPU_ARCH="gfx1101",
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D4R_DLSS_DLL=str(self.root / "missing.dll"))
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env.pop("D4R_ZLUDA_EMIT", None)
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result = run("bash", ROOT / "kernels/build.sh", "tex", self.root / "out", env=env)
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self.assertNotEqual(result.returncode, 0)
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self.assertIn("D4R_ZLUDA_EMIT", result.stderr)
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class Rdna2Packaging(unittest.TestCase):
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def rdna2_branch(self, path):
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text = (ROOT / path).read_text()
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start = text.index('if [[ "$arch" == gfx103* ]]; then')
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return text[start:text.index("\n fi\n", start)]
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def test_package_copies_only_the_validated_hiluma_kernels(self):
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branch = self.rdna2_branch("scripts/package_release.sh")
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copies = re.findall(r'"\$tex_dir"/([^ ;]+\.hsaco)', branch)
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self.assertEqual(sorted(copies), ["hiluma_engine_input_*_v2_rel.hsaco",
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"hiluma_engine_output_*_hdr_max_v2_rel.hsaco"])
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self.assertIn('"$VARIANT" != clean', branch) # the no-NVIDIA zip ships no PTX-derived code
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self.assertNotIn("build.sh\" m", branch)
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# the accuracy set gets K's layers only (ZLUDA keeps compiling hiluma there)
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self.assertNotRegex(branch, r'PREFER_ACCURACY=1[^\n]*\n?[^\n]*build.sh" tex')
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self.assertIn("kernel_manifest.py", branch)
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def test_release_builder_builds_rdna2_fast_textures_only(self):
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text = (ROOT / "scripts/build_release_glibc241.sh").read_text()
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start = text.index('if [[ "$arch" == gfx103* ]]; then')
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branch = text[start:text.index("fi\n", start)]
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self.assertIn("D4R_PREFER_ACCURACY=0", branch)
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self.assertNotIn("D4R_PREFER_ACCURACY=1", branch)
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self.assertIn('kernels/build.sh" tex', branch)
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self.assertIn("return 0", branch)
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class F16RoundingContract(unittest.TestCase):
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def translate(self, directory):
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ptx = directory / "tiny.ptx"
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ptx.write_text(TINY_PTX)
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result = run("python3", ROOT / "kernels/native/ptx2hip.py", ptx, "tiny", check=True)
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return result.stdout
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def test_translator_routes_f16_conversions_through_f2h_rn(self):
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with tempfile.TemporaryDirectory() as temp:
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source = self.translate(Path(temp))
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self.assertEqual(source.count("f2h_rn("), 3)
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self.assertNotRegex(source, r"\(h1\)f\d")
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@unittest.skipUnless(CLANG.is_file(), "ROCm clang not found (set D4R_ROCM_DIR)")
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def test_no_single_rounding_mix_instructions(self):
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with tempfile.TemporaryDirectory() as temp:
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temp = Path(temp)
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(temp / "tiny.hip").write_text(self.translate(temp))
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for arch, wave in (("gfx1032", "32"), ("gfx1101", "64")):
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env = dict(os.environ, D4R_ROCM_DIR=str(ROCM), D4R_GPU_ARCH=arch, WAVE=wave)
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run("bash", ROOT / "kernels/native/build_native.sh", temp / "tiny.hip", temp / f"{arch}.hsaco",
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env=env, check=True)
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asm = (temp / f"{arch}.s").read_text()
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self.assertNotRegex(asm, r"v_fma_mix(lo|hi)_f16", arch)
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# canary: a plain cast in the same kernel is fused, so the check above can fail
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(temp / "cast.hip").write_text((temp / "tiny.hip").read_text().replace("f2h_rn(", "(h1)("))
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env = dict(os.environ, D4R_ROCM_DIR=str(ROCM), D4R_GPU_ARCH="gfx1032", WAVE="32")
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run("bash", ROOT / "kernels/native/build_native.sh", temp / "cast.hip", temp / "cast.hsaco",
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env=env, check=True)
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self.assertRegex((temp / "cast.s").read_text(), r"v_fma_mix(lo|hi)_f16")
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@unittest.skipUnless(os.environ.get("D4R_RUN_KERNEL_BUILD_TESTS") == "1", "set D4R_RUN_KERNEL_BUILD_TESTS=1")
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@unittest.skipUnless(CLANG.is_file() and PTX_DIR.is_dir() and all(TOOLS), "needs ROCm clang, LLVM tools and PTX")
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class Rdna2TextureBuild(unittest.TestCase):
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@classmethod
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def setUpClass(cls):
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cls.temp = tempfile.TemporaryDirectory()
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cls.out = Path(cls.temp.name) / "gfx1032"
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env = dict(os.environ, D4R_ROCM_DIR=str(ROCM), D4R_GPU_ARCH="gfx1032", D4R_DLSS_DLL="unused",
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D4R_DLSS_PTX_DIR=str(PTX_DIR))
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run("bash", ROOT / "kernels/build.sh", "tex", cls.out, env=env, check=True)
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@classmethod
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def tearDownClass(cls):
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cls.temp.cleanup()
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def notes(self, name):
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return run(TOOLS[0], "--notes", "-h", self.out / f"{name}.hsaco", check=True).stdout
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def test_exactly_the_validated_kernels(self):
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self.assertEqual({p.stem for p in self.out.glob("*.hsaco")}, OUTPUTS | INPUTS)
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def test_code_objects_are_wave32_gfx1032_without_scratch_or_wmma(self):
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for name in OUTPUTS | INPUTS:
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notes = self.notes(name)
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self.assertIn("gfx1032", notes, name)
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self.assertRegex(notes, r"\.wavefront_size:\s+32", name)
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self.assertRegex(notes, r"\.private_segment_fixed_size:\s+0\b", name)
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code = run(TOOLS[1], "-d", "--mcpu=gfx1032", self.out / f"{name}.hsaco", check=True).stdout
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self.assertNotRegex(code, r"v_wmma|v_fma_mix(lo|hi)_f16|v_dot\d", name)
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def test_output_kernels_use_wgp_mode(self):
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for name in OUTPUTS:
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asm = (self.out / f"{name}.s").read_text()
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self.assertIn(".amdhsa_workgroup_processor_mode 1", asm, name)
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if __name__ == "__main__":
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unittest.main()
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