Port K kernel tuning and M gfx1101 flags

Preset K, byte-identical to the previous output in all captured buffers
and the harness image, measured on an RX 7700 XT:

- LDS row padding so WMMA operand loads hit distinct banks

- WGP mode for enc1/enc2/dec1/dec2, ds_bpermute half-wave exchange for
  enc0/dec0/dec3, more waves per window in enc4/dec4/dec5

- cheaper operand plumbing in common/wmma_layout.h (packed f16
  conversions, no dynamic vector indexing), raw buffer weight loads,
  accumulator-init vectors prepared once

- enc1 as a single-buffer recompute layer, dec1 Q/K/V chains split

- dec5 as four dependent phase kernels

kernels/k/dltss_pwin_enc1_layer.hip

@@ -1,5 +1,5 @@
-// CU mode: the waves of a window share one L0 cache (1-6% faster here; slower in the wide layers)
-// d4r-build-flags: -mcumode
+// Exact single-buffer enc1: reload the original input for the residual, preserve WGP mode.
+// d4r-build-flags: -DPOS_VSHARE1 -DPWIN_VEC_SCALAR -DPWIN_PK_ELEM
 #define PWIN_F32ACC
-#include "pwin_layer.h"
-PWIN_ENCODER_POS(dltss_pwin_enc1_layer, 2, 64, 64, true)
+#include "pwin_pos_recompute.h"
+POS_RECOMPUTE_ENCODER(dltss_pwin_enc1_layer, 2, 64, 64, 0, 1)