Port K kernel tuning and M gfx1101 flags

Preset K, byte-identical to the previous output in all captured buffers
and the harness image, measured on an RX 7700 XT:

- LDS row padding so WMMA operand loads hit distinct banks

- WGP mode for enc1/enc2/dec1/dec2, ds_bpermute half-wave exchange for
  enc0/dec0/dec3, more waves per window in enc4/dec4/dec5

- cheaper operand plumbing in common/wmma_layout.h (packed f16
  conversions, no dynamic vector indexing), raw buffer weight loads,
  accumulator-init vectors prepared once

- enc1 as a single-buffer recompute layer, dec1 Q/K/V chains split

- dec5 as four dependent phase kernels

kernels/k/dltss_pwin_dec5_layer.hip

@@ -1,2 +1,4 @@
-#include "pwin_wide.h"
-WIDE_PLAIN(dltss_pwin_dec5_layer, 8, 160, 4)
+// dec5 (bottleneck, H 8, C 160) as four phase kernels (pwin_phase.h). Needs the patched
+// ZLUDA hook (post kernels). MAXW 64 windows (1440p: 9).
+#include "pwin_phase.h"
+PHASE_PLAIN(dltss_pwin_dec5_layer, 8, 160, 64, 128, 96, 384, 96)