Port K kernel tuning and M gfx1101 flags
Preset K, byte-identical to the previous output in all captured buffers and the harness image, measured on an RX 7700 XT: - LDS row padding so WMMA operand loads hit distinct banks - WGP mode for enc1/enc2/dec1/dec2, ds_bpermute half-wave exchange for enc0/dec0/dec3, more waves per window in enc4/dec4/dec5 - cheaper operand plumbing in common/wmma_layout.h (packed f16 conversions, no dynamic vector indexing), raw buffer weight loads, accumulator-init vectors prepared once - enc1 as a single-buffer recompute layer, dec1 Q/K/V chains split - dec5 as four dependent phase kernels
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@@ -52,8 +52,15 @@ build_hip() {
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name="$(basename "$src" .hip)"
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local tmp flags
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tmp="$(mktemp -d)"
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# per-kernel compiler flags from a "// d4r-build-flags: ..." line in the source
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# per-kernel compiler flags from a "// d4r-build-flags: ..." line in the source. A line for the target
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# ("// d4r-build-flags-gfx1101:", or "// d4r-build-flags-gfx12:" for any gfx12 target) replaces it.
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flags="$(sed -n 's|^// d4r-build-flags: *||p' "$src")"
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for tag in "$ARCH" "${ARCH%??}"; do
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if grep -q "^// d4r-build-flags-$tag:" "$src"; then
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flags="$(sed -n "s|^// d4r-build-flags-$tag: *||p" "$src")"
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break
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fi
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done
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[[ "$ACCURACY" == 1 ]] && extra+=" -DD4R_ACCURACY"
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# shellcheck disable=SC2086
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(cd "$tmp" && "$CLANG" -x hip --offload-arch="$ARCH" --offload-device-only -O3 $flags $extra -I"$ROCM/include" \
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@@ -114,12 +121,38 @@ if [[ "$WHAT" == all || "$WHAT" == tex || "$WHAT" == l ]]; then
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for mode in static dynamic; do
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for range in hdr ldr; do specs+=("rrlite_downsample_kernel_${mode}_${range}:sust_only"); done
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done
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# The fast set serves two K kernels from native code translated from the PTX (kernels/native): these builds
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# replace the sust_only build of the same name. The accuracy set keeps ZLUDA's compile (denormals preserved).
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native_out=hiluma_engine_output_depthinv_mvhi_hdr_max_v2_rel
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native_in=hiluma_engine_input_depthinv_mvhi_hdr_v2_rel
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for spec in "${specs[@]}"; do
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IFS=: read -r kernel src mode <<< "$spec"
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[[ "$ACCURACY" == 0 && "$kernel" == "$native_out" ]] && continue
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D4R_PREFER_ACCURACY="$ACCURACY" \
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D4R_ZLUDA_WAVE64="$([[ "$mode" == w64 && "$ACCURACY" == 0 ]] && echo 1 || echo 0)" D4R_ROCM_DIR="$ROCM" D4R_GPU_ARCH="$ARCH" \
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D4R_TEX_FP8="$FP8" D4R_DLSS_PTX_DIR="$PTX_DIR" "$HERE/tex/build_tex.sh" "$kernel" "$src" "$OUT"
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done
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if [[ "$WHAT" != l && "$ACCURACY" == 0 ]]; then
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# NVIDIA's PTX translated to HIP (native/ptx2hip.py) and rebuilt natively; the generated sources stay in a
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# temporary directory. Both kernels run through the same texture/surface helpers as the other texture
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# kernels and are byte-identical to ZLUDA's compile of the PTX.
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ptx_of() { grep -l -E "\.entry[[:space:]]+$1[[:space:]]*\(" "$PTX_DIR"/*.ptx | head -1; }
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NAT="$HERE/native"
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NT="$(mktemp -d)"
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trap 'rm -rf "$NT"' EXIT
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ptx="$(ptx_of "$native_out")"; [[ -n "$ptx" ]] || { echo "no PTX defines $native_out" >&2; exit 2; }
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# hiluma output (path B for Quality..UltraPerf), LDS tile as a function, global-memory redirect stores
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python3 "$NAT/ptx2hip.py" --ctile --as1 "$ptx" "$native_out" > "$NT/output_translated.hip"
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python3 "$NAT/rewrite_output.py" "$NT/output_translated.hip" > "$NT/$native_out.hip"
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D4R_ROCM_DIR="$ROCM" D4R_GPU_ARCH="$ARCH" "$NAT/build_native.sh" "$NT/$native_out.hip" "$OUT/$native_out.hsaco" \
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-DD4R_NATIVE_F2I -DD4R_K_NO_DEPTH_TILE -DD4R_AS1_STORES
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# hiluma input: scratch arrays in registers, wave32
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ptx="$(ptx_of "$native_in")"; [[ -n "$ptx" ]] || { echo "no PTX defines $native_in" >&2; exit 2; }
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python3 "$NAT/ptx2hip.py" --ifconv --sink "$ptx" "$native_in" > "$NT/in_ifs.hip"
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python3 "$NAT/in_fuse.py" "$NT/in_ifs.hip" > "$NT/in_unit.h"
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cp "$NAT/in_regs.hip" "$NT/in_regs.hip"
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D4R_ROCM_DIR="$ROCM" D4R_GPU_ARCH="$ARCH" WAVE=32 "$NAT/build_native.sh" "$NT/in_regs.hip" "$OUT/$native_in.hsaco"
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fi
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fi
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[[ "$ACCURACY" == 1 ]] && printf '1\n' > "$OUT/d4r-accuracy.txt"
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echo "native kernels in $OUT"
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