d4r: official NVIDIA DLSS on AMD GPUs under Linux and Proton
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// Measures host<->array and host<->linear copy bandwidth through the CUDA
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// driver API (ZLUDA), for the staging sizes the NGX shim moves per frame.
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// usage: bench_cuda_copies [WIDTH HEIGHT CHANNELS] (half-float texels)
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#include <dlfcn.h>
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#include <chrono>
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#include <cstdint>
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#include <cstdio>
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#include <cstdlib>
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#include <cstring>
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using CUresult = int;
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using CUdeviceptr = uint64_t;
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struct Memcpy2D
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{
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size_t srcXInBytes, srcY;
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uint32_t srcMemoryType, srcAlignment;
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const void* srcHost;
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CUdeviceptr srcDevice;
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void* srcArray;
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size_t srcPitch;
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size_t dstXInBytes, dstY;
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uint32_t dstMemoryType, dstAlignment;
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void* dstHost;
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CUdeviceptr dstDevice;
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void* dstArray;
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size_t dstPitch;
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size_t WidthInBytes, Height;
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};
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struct ArrayDescriptor
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{
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size_t Width, Height;
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int32_t Format;
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uint32_t NumChannels;
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};
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template <typename Function> static Function load(void* library, const char* name)
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{
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void* raw = dlsym(library, name);
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if (raw == nullptr)
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{
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std::fprintf(stderr, "missing %s\n", name);
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std::exit(1);
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}
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Function function{};
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std::memcpy(&function, &raw, sizeof(function));
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return function;
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}
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int main(int argc, char** argv)
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{
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const size_t width = argc > 3 ? std::strtoul(argv[1], nullptr, 0) : 2560;
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const size_t height = argc > 3 ? std::strtoul(argv[2], nullptr, 0) : 1440;
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const unsigned channels = argc > 3 ? static_cast<unsigned>(std::strtoul(argv[3], nullptr, 0)) : 4;
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const size_t rowBytes = width * 2 * channels, bytes = rowBytes * height;
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void* library = dlopen("libcuda.so", RTLD_NOW | RTLD_LOCAL);
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if (library == nullptr)
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return 1;
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auto init = load<CUresult (*)(unsigned)>(library, "cuInit");
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auto device_get = load<CUresult (*)(int*, int)>(library, "cuDeviceGet");
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auto context_create = load<CUresult (*)(void**, unsigned, int)>(library, "cuCtxCreate_v2");
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auto alloc_host = load<CUresult (*)(void**, size_t, unsigned)>(library, "cuMemHostAlloc");
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auto alloc = load<CUresult (*)(CUdeviceptr*, size_t)>(library, "cuMemAlloc_v2");
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auto array_create = load<CUresult (*)(void**, const ArrayDescriptor*)>(library, "cuArrayCreate_v2");
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auto copy = load<CUresult (*)(const Memcpy2D*)>(library, "cuMemcpy2D_v2");
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auto synchronize = load<CUresult (*)()>(library, "cuCtxSynchronize");
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int device = 0;
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void* context = nullptr;
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void *pinned = nullptr, *array = nullptr;
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CUdeviceptr linear = 0;
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CUresult result = 0;
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#define STEP(call) \
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if ((result = (call)) != 0) \
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{ \
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std::fprintf(stderr, "%s failed: %d\n", #call, result); \
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return 1; \
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}
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STEP(init(0));
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STEP(device_get(&device, 0));
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STEP(context_create(&context, 0, device));
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STEP(alloc_host(&pinned, bytes, 0));
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STEP(alloc(&linear, bytes));
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const ArrayDescriptor descriptor{width, height, 0x10 /* HALF */, channels};
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STEP(array_create(&array, &descriptor));
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void* pageable = std::malloc(bytes);
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std::memset(pageable, 1, bytes);
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std::memset(pinned, 1, bytes);
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enum { HOST = 1, DEVICE = 2, ARRAY = 3 };
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auto run = [&](const char* label, uint32_t srcType, uint32_t dstType, void* host) {
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Memcpy2D request{};
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request.srcMemoryType = srcType;
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request.dstMemoryType = dstType;
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request.srcHost = host;
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request.dstHost = host;
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request.srcDevice = linear;
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request.dstDevice = linear;
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request.srcArray = array;
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request.dstArray = array;
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request.srcPitch = request.dstPitch = rowBytes;
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request.WidthInBytes = rowBytes;
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request.Height = height;
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double best = 1e9;
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for (int iteration = 0; iteration < 10; ++iteration)
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{
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synchronize();
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const auto start = std::chrono::steady_clock::now();
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if (copy(&request) || synchronize())
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{
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std::printf("%-26s failed\n", label);
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return;
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}
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const double ms =
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std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - start).count();
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best = ms < best ? ms : best;
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}
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std::printf("%-26s %7.3f ms %6.2f GB/s\n", label, best, bytes / best / 1e6);
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};
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if (argc > 1 && std::strcmp(argv[1], "overlap") == 0)
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{
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// The shim's per-frame transfers: color 856x480 RGBA16F, depth 856x480
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// R32F and motion 2560x1440 RG16F up; the 2560x1440 RGBA16F result down.
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// Compares issuing them back to back with overlapping the upload and
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// the download on two streams (pinned host memory, async copies).
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auto create_stream = load<CUresult (*)(void**, unsigned)>(library, "cuStreamCreate");
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auto stream_sync = load<CUresult (*)(void*)>(library, "cuStreamSynchronize");
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struct Plane { size_t w, h; unsigned ch; int32_t fmt; size_t texel; void* host; void* array; };
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Plane planes[4] = {{856, 480, 4, 0x10, 8}, {856, 480, 1, 0x20, 4}, {2560, 1440, 2, 0x10, 4},
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{2560, 1440, 4, 0x10, 8}};
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for (Plane& plane : planes)
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{
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STEP(alloc_host(&plane.host, plane.w * plane.h * plane.texel, 0));
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std::memset(plane.host, 1, plane.w * plane.h * plane.texel);
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const ArrayDescriptor d{plane.w, plane.h, plane.fmt, plane.ch};
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STEP(array_create(&plane.array, &d));
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}
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void *up = nullptr, *down = nullptr;
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STEP(create_stream(&up, 1)); // CU_STREAM_NON_BLOCKING
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STEP(create_stream(&down, 1));
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auto request = [&](Plane& plane, bool upload) {
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Memcpy2D r{};
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r.srcMemoryType = upload ? HOST : ARRAY;
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r.dstMemoryType = upload ? ARRAY : HOST;
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r.srcHost = plane.host;
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r.dstHost = plane.host;
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r.srcArray = r.dstArray = plane.array;
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r.srcPitch = r.dstPitch = plane.w * plane.texel;
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r.WidthInBytes = plane.w * plane.texel;
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r.Height = plane.h;
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return r;
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};
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// Linear device staging per plane: the async DMA runs host<->linear on
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// two non-blocking streams; arrays are filled/read with fast D2D copies.
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auto copy_h2d_async = load<CUresult (*)(CUdeviceptr, const void*, size_t, void*)>(library, "cuMemcpyHtoDAsync_v2");
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auto copy_d2h_async = load<CUresult (*)(void*, CUdeviceptr, size_t, void*)>(library, "cuMemcpyDtoHAsync_v2");
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CUdeviceptr staging[4] = {};
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for (int i = 0; i < 4; ++i)
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STEP(alloc(&staging[i], planes[i].w * planes[i].h * planes[i].texel));
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auto d2d = [&](Plane& plane, CUdeviceptr linear, bool toArray) {
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Memcpy2D r{};
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r.srcMemoryType = toArray ? DEVICE : ARRAY;
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r.dstMemoryType = toArray ? ARRAY : DEVICE;
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r.srcDevice = r.dstDevice = linear;
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r.srcArray = r.dstArray = plane.array;
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r.srcPitch = r.dstPitch = plane.w * plane.texel;
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r.WidthInBytes = plane.w * plane.texel;
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r.Height = plane.h;
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return copy(&r);
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};
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for (int mode = 0; mode < 3; ++mode)
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{
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double best = 1e9;
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for (int iteration = 0; iteration < 20; ++iteration)
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{
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synchronize();
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const auto start = std::chrono::steady_clock::now();
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CUresult status = 0;
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if (mode == 0) // current shim: synchronous 2D copies, one after another
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{
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for (int i = 0; i < 3; ++i) { Memcpy2D r = request(planes[i], true); status |= copy(&r); }
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Memcpy2D r = request(planes[3], false);
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status |= copy(&r);
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}
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else
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{
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const size_t outBytes = planes[3].w * planes[3].h * planes[3].texel;
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status |= d2d(planes[3], staging[3], false);
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status |= copy_d2h_async(planes[3].host, staging[3], outBytes, down);
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if (mode == 2) // serialized control: wait for the download first
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status |= stream_sync(down);
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for (int i = 0; i < 3; ++i)
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status |= copy_h2d_async(staging[i], planes[i].host, planes[i].w * planes[i].h * planes[i].texel, up);
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status |= stream_sync(up);
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for (int i = 0; i < 3; ++i)
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status |= d2d(planes[i], staging[i], true);
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status |= stream_sync(down);
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}
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synchronize();
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if (status != 0)
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{
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std::printf("mode %d failed\n", mode);
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break;
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}
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const double ms = std::chrono::duration<double, std::milli>(std::chrono::steady_clock::now() - start).count();
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best = ms < best ? ms : best;
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}
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std::printf("%-46s %7.3f ms\n", mode == 0 ? "sequential sync 2D (current shim path)" : mode == 1 ? "linear staging, down || up overlapped" : "linear staging, down then up (no overlap)", best);
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}
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return 0;
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}
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std::printf("%zux%zu x%u half = %.1f MB\n", width, height, channels, bytes / 1e6);
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run("pageable -> array", HOST, ARRAY, pageable);
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run("pinned -> array", HOST, ARRAY, pinned);
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run("pinned -> linear", HOST, DEVICE, pinned);
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run("linear -> array", DEVICE, ARRAY, nullptr);
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run("array -> pageable", ARRAY, HOST, pageable);
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run("array -> pinned", ARRAY, HOST, pinned);
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run("array -> linear", ARRAY, DEVICE, nullptr);
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run("linear -> pinned", DEVICE, HOST, pinned);
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return 0;
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}
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